EP910LI-35T vs EP910LI-40 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910LI-35T disebabkan oleh Intel dan EP910LI-40 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EP910LI-35T - 24-Macrocell Classic EPLD 35ns 44-PLCC | Intel
EP910LI-35T ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP910LI-35T | EP910LI-40 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Masa Terakhir Dibeli | Obsolete |
| Family | Classic EPLD (EP910) | — |
| Logic Elements | 24 macrocells | — |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 35 ns | 40 ns |
| Maximum Toggle Frequency (fMAX) | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS, EPROM-based | Low-power CMOS (L-suffix) |
| Kemasan | 44-pin PLCC (JEDEC) | PLCC-44 (J-lead, windowed ceramic) |
| Suhu Operasi | -40C to +85C (industrial, 'I' suffix) | -40C to +85C (industrial, I-suffix) |
| Jenis Pemasangan | Surface Mount / Socket | Surface Mount (socket-compatible) |
| Programming Method | EPROM (UV-erasable for windowed versions) | — |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Number of I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| Status RoHS | [DATA_NEEDED: RoHS compliance] | Non-compliant (windowed ceramic PLCC, legacy) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Manufacturer | — | Altera (now Intel PSG) |
| Product Family | — | Classic EPLD - EP910 series |
| Device Type | — | Erasable Programmable Logic Device (EPLD) |
| Macrocells | — | 24 |
| Dedicated Inputs | — | 12 |
| I/O Pins | — | 24 bidirectional |
| Maximum Logic Inputs | — | 36 |
| Product Terms | — | 240 |
| Programmability | — | UV-erasable, JEDEC-standard algorithm |
| Lifecycle | — | Obsolete - replaced by MAX 7000 / MAX II CPLD family |