EP910PC-20 vs EP910PC30T Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910PC-20 disebabkan oleh Altera dan EP910PC30T disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP910PC-20 EP910PC30T
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Altera Classic EPLD Altera Classic EPLD
Device EP910 —
Usable Gates 900 —
Macrocell Count [DATA_NEEDED: macrocell count] —
Pin-to-Pin Delay (tPD) 20 ns —
Kemasan PDIP-24 (PC suffix) 24-pin PDIP (PC)
Kiraan Pin 24 24
Supply Voltage (VCC) 5 V 5 V (4.75 V to 5.25 V)
Technology CMOS EPROM (UV-erasable) —
I/O Compatibility 100% TTL —
Suhu Operasi 0C to +70C (commercial) [DATA_NEEDED: operating temperature range]
Programming Method EPROM programmer, JEDEC fuse map —
Jenis Pemasangan Through-Hole (DIP) Through-Hole (THT)
Aras MSL [DATA_NEEDED: MSL level] —
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Device Series — EP910
Number of Macrocells — 24
Number of I/O Pins — 24
Number of Dedicated Inputs — 12
Maximum Product Terms — 240
Propagation Delay (tPD) — 30 ns
Maximum Clock Frequency (fMAX) — 33.3 MHz
Process Technology — CMOS
Programmable Logic Architecture — PAL-type sum-of-products, EPLD
Speed Grade — -30 (30 ns tPD)
Programming Technology — EPROM (OTP in plastic package, UV-erasable in windowed package)

Laporan Datasheet & Sumber

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