EP910PC-25 vs EP910PC-15 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910PC-25 disebabkan oleh Altera dan EP910PC-15 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP910PC-25 EP910PC-15
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Product Family Classic EPLD —
Usable Gates 900 900
Integration Gates (typical) 4800 —
Macrocells 24 24
Pin-to-Pin Delay (tPD) 25 ns —
Maximum Operating Frequency (fMAX) 33.3 MHz —
Supply Voltage (VCC) 5 V +/- 10% 4.75 V to 5.25 V (5 V nominal)
Technology CMOS EPROM —
Kemasan PDIP-24 (Plastic DIP) 24-pin PDIP (PDIP-24, 0.300 inch)
Kiraan Pin 24 —
Dedicated Inputs 10 10
Dedicated I/O Pins 12 12
TTL Compatibility 100% TTL emulation —
Suhu Operasi 0C to +70C (commercial) 0C to +70C (commercial)
Erasure Method Not erasable in plastic package (windowless) —
Family — Altera Classic EPLD
Maximum Pin-to-Pin Delay (tpd) — 15 ns
Counter Frequency (fCNT) — 100 MHz
Supply Current (Icc) — 80 mA typical
Jenis Pemasangan — Through-Hole
Process Technology — CMOS, UV-erasable
Programming Method — Altera Logic Programmer card
Status RoHS — [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS]
Aras MSL — Not applicable (through-hole)

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