EP910PC-25 vs EP910PC-15T Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910PC-25 disebabkan oleh Altera dan EP910PC-15T disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP910PC-25 | EP910PC-15T |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Product Family | Classic EPLD | — |
| Usable Gates | 900 | — |
| Integration Gates (typical) | 4800 | — |
| Macrocells | 24 | — |
| Pin-to-Pin Delay (tPD) | 25 ns | 15 ns |
| Maximum Operating Frequency (fMAX) | 33.3 MHz | — |
| Supply Voltage (VCC) | 5 V +/- 10% | 5 V (nominal) |
| Technology | CMOS EPROM | CMOS, UV-erasable / OTP |
| Kemasan | PDIP-24 (Plastic DIP) | 40-pin PDIP (Plastic DIP) |
| Kiraan Pin | 24 | — |
| Dedicated Inputs | 10 | — |
| Dedicated I/O Pins | 12 | — |
| TTL Compatibility | 100% TTL emulation | — |
| Suhu Operasi | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Erasure Method | Not erasable in plastic package (windowless) | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Family | — | Altera Classic EPLD |
| Macrocell Count | — | 24 |
| Dedicated Input Pins | — | 10 |
| Speed Grade | — | -15 (15 ns) |
| Jenis Pemasangan | — | Through-hole (DIP) |
| Output Drive Current | — | [DATA_NEEDED: IOL per output] |
| Logic Capacity | — | 24 macrocells / 72 product terms (typical Classic architecture) |
| Programming Method | — | JEDEC fuse map via Altera LogicMap / MAX+PLUS II |
| Status RoHS | — | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Security Bit | — | Yes (design protection) |
| Tape and Reel | — | Yes (suffix T) |