EPC2C20 vs EPC2LC20CAD Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC2C20 disebabkan oleh Altera dan EPC2LC20CAD disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPC2C20 | EPC2LC20CAD |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | Memory ICs |
| Status Lingkungan Hidup | Aktif | Obsolete |
| Manufacturer | Altera | — |
| MPN | EPC2C20 | — |
| Device Type | Configuration device integrated circuit | — |
| Primary Function | Configuration of SRAM-based lookup-table devices | — |
| Configuration Architecture | Single-device configuration solution | — |
| Architecture Block 1 | Configuration controller | — |
| Architecture Block 2 | Flash memory | — |
| Memory Technology | Flash memory | — |
| Supported Device Class | SRAM-based LUT devices | — |
| Configuration Mode | [DATA_NEEDED: configuration mode] | Serial (bit-wide, Altera FPGAs) |
| Memory Density | [DATA_NEEDED: memory density] | — |
| Configuration Data Interface | [DATA_NEEDED: configuration data interface] | — |
| Operating Voltage | [DATA_NEEDED: operating voltage] | — |
| Configuration Clock Frequency | [DATA_NEEDED: configuration clock frequency] | — |
| Kemasan | [DATA_NEEDED: package] | 20-pin J-lead PLCC (PLCC-20) |
| Kiraan Pin | [DATA_NEEDED: pin count] | 20 |
| Gambaran Suhu Operasi | [DATA_NEEDED: operating temperature range] | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Jenis Ingatan | — | Configuration PROM (Flash) |
| Memory Capacity | — | 1.6 Mbit |
| Tegangan Pemberi Arus | — | 3.3 V (nominal) |
| I/O Voltage Tolerance | — | 5 V tolerant |
| Program Interface | — | IEEE Std 1149.1 JTAG (in-system programmable) |
| Suhu Operasi | — | -40C to +85C (commercial) |
| Maximum Input Voltage (DC) | — | -0.3 V to +7.0 V |
| Input Undershoot/Overshoot | — | -2.0 V to +7.0 V for <100 mA, <20 ns no-load |
| Compatible FPGA Families | — | APEX 20K, ACEX 1K, Cyclone, Stratix |
| Programming Method | — | JTAG ISP (no external programmer required) |
| Jenis Pemasangan | — | Surface Mount / Through-hole (PLCC socket) |