EPC2C20 vs EPC2LC20CAD Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC2C20 sa pamamagitan ng Altera at EPC2LC20CAD sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EPC2C20 EPC2C20 - Altera FPGA Configuration Device

EPC2C20 - Altera FPGA Configuration Device

EPC2C20 ✓ Nakahanda

Pagsanggunian na paghahambing

Parametro EPC2C20 EPC2LC20CAD
Brand Altera Altera
Kategorya FPGA & CPLD Memory ICs
Katayuan ng Lifecycle Aktibo Obsolete
Manufacturer Altera —
MPN EPC2C20 —
Device Type Configuration device integrated circuit —
Primary Function Configuration of SRAM-based lookup-table devices —
Configuration Architecture Single-device configuration solution —
Architecture Block 1 Configuration controller —
Architecture Block 2 Flash memory —
Memory Technology Flash memory —
Supported Device Class SRAM-based LUT devices —
Configuration Mode [DATA_NEEDED: configuration mode] Serial (bit-wide, Altera FPGAs)
Memory Density [DATA_NEEDED: memory density] —
Configuration Data Interface [DATA_NEEDED: configuration data interface] —
Operating Voltage [DATA_NEEDED: operating voltage] —
Configuration Clock Frequency [DATA_NEEDED: configuration clock frequency] —
Packhaging [DATA_NEEDED: package] 20-pin J-lead PLCC (PLCC-20)
Bilang ng Pin [DATA_NEEDED: pin count] 20
Hanay ng Temperature na Operasyon [DATA_NEEDED: operating temperature range] —
Tindminan RoHS [DATA_NEEDED: RoHS status] Compliant
REACH Status [DATA_NEEDED: REACH status] —
AEC-Q100 Qualification [DATA_NEEDED: AEC-Q100 qualification] —
Uri ng Memory — Configuration PROM (Flash)
Memory Capacity — 1.6 Mbit
Volte ng Pagbibigay — 3.3 V (nominal)
I/O Voltage Tolerance — 5 V tolerant
Program Interface — IEEE Std 1149.1 JTAG (in-system programmable)
Temperature na Operasyon — -40C to +85C (commercial)
Maximum Input Voltage (DC) — -0.3 V to +7.0 V
Input Undershoot/Overshoot — -2.0 V to +7.0 V for <100 mA, <20 ns no-load
Compatible FPGA Families — APEX 20K, ACEX 1K, Cyclone, Stratix
Programming Method — JTAG ISP (no external programmer required)
Uri ng Pagpapasok — Surface Mount / Through-hole (PLCC socket)

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