EPC2LC20-V vs EPC2LI20 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC2LC20-V disebabkan oleh Altera dan EPC2LI20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPC2LC20-V EPC2LI20
Merek Altera Altera
Kategori Memory ICs Memory ICs
Status Lingkungan Hidup Obsolete NRND
Jenis Ingatan Configuration PROM (Flash-based, in-system programmable) Flash (in-system programmable)
Memory Density 1.6 Mbit —
Configuration Interface Serial (Altera FPP/PS modes via DCLK/nSTATUS/CONF_DONE) Serial or Byte-wide (parallel)
Maximum Configuration Clock 10 MHz —
Supply Voltage VCC 3.3 V —
I/O Tolerance 5 V tolerant on configuration pins —
In-System Programming Yes, via IEEE 1149.1 JTAG (TMS/TCK/TDI/TDO) —
Cascade Support Yes, daisy-chainable for >1.6 Mbit designs —
Operating Temperature Range (V suffix) 0 °C to +70 °C (commercial) —
Package Type 20-pin PLCC (JEDEC MS-018) —
Package Dimensions 9 x 9 mm body, 1.27 mm pitch —
Jenis Pemasangan Surface Mount (PLCC socket compatible) Surface Mount (PLCC socket-compatible)
Supported FPGA Families APEX 20K, ACEX 1K, FLEX 10K, FLEX 6000, MAX 9000 —
Status RoHS Compliant (per distributor listings) [DATA_NEEDED: RoHS status]
Lead-Free Yes —
Saiz Ingatan — 1.6 Mb (1,572,864 bits)
Programmable Type — In System Programmable (ISP)
Fungsi — Configuration PROM for SRAM-based FPGAs
Supply Voltage - Operating — 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing)
Suhu Operasi — -40 C to +85 C (Industrial)
Kemasan / Case — 20-PLCC (J-lead, 9x9 mm)
Decompression — On-chip (supports compressed bitstreams)
JTAG / ISP Interface — IEEE 1532 (TCK, TMS, TDI, TDO)
Multi-Device Support — Yes (daisy-chain configuration)
User-Accessible Memory — Yes (unused flash available to user logic)
Aras MSL — [DATA_NEEDED: MSL level]

Laporan Datasheet & Sumber

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