EPC2LC20 vs EPC1LC20C Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC2LC20 disebabkan oleh Altera dan EPC1LC20C disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPC2LC20 | EPC1LC20C |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | Memory ICs | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | NRND |
| Jenis Ingatan | Non-volatile configuration PROM | Serial Configuration Flash |
| Saiz Ingatan | 1.6 Mbit | 1 Mbit (1,048,576 bits) |
| Configuration Interface | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE | — |
| Programming Interface | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant | — |
| Supply Voltage VCC | 3.0 V to 3.6 V (3.3-V operation) | — |
| ISP Voltage Range | 5.0 V or 3.3 V | — |
| Supported FPGA Families | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 | — |
| Cascade Support | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams | — |
| Kemasan | 20-pin PLCC (J-lead, 9x9 mm) | 20-pin LCC (Leadless Chip Carrier) |
| Jenis Pemasangan | Surface Mount | Surface Mount (ceramic) |
| Suhu Operasi | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] | -40C to +85C (industrial) |
| Status RoHS | Non-Compliant (original Altera Pb-containing part) | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free Version | EPC2LC20N available as lead-free equivalent | — |
| Programming Support | Altera Programming Unit (APU), Quartus II, JTAG programmer | — |
| Boundary-Scan | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG | — |
| Configuration Clock (DCLK) | — | 8 MHz maximum |
| Antaramuka | — | Serial (DATA/DCLK) + JTAG (IEEE 1149.1) |
| Tegangan Pemberi Arus | — | 3.3 V or 5.0 V |
| Programmability | — | In-system via JTAG |
| Cascading Support | — | Yes (nCS, CS pins) |
| Compatible FPGA Families | — | FLEX 10K, ACEX 1K, APEX 20K |
| JTAG Pins | — | TCK, TMS, TDI, TDO |
| Configuration Mode | — | Slave-serial (FPGA-master) |
| Aras MSL | — | MSL3 (ceramic, floor life 168 hours) |