EPC2LI20 vs EPC1LI20 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC2LI20 disebabkan oleh Altera dan EPC1LI20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPC2LI20 | EPC1LI20 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | Memory ICs | Memory ICs |
| Status Lingkungan Hidup | NRND | Obsolete |
| Saiz Ingatan | 1.6 Mb (1,572,864 bits) | 1 Mb (1,048,576 bits) |
| Jenis Ingatan | Flash (in-system programmable) | OTP Configuration PROM (EPROM-based) |
| Programmable Type | In System Programmable (ISP) | — |
| Fungsi | Configuration PROM for SRAM-based FPGAs | — |
| Supply Voltage - Operating | 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing) | — |
| Suhu Operasi | -40 C to +85 C (Industrial) | [DATA_NEEDED: operating temperature range] |
| Kemasan / Case | 20-PLCC (J-lead, 9x9 mm) | — |
| Jenis Pemasangan | Surface Mount (PLCC socket-compatible) | Surface Mount (PLCC socket compatible) |
| Configuration Interface | Serial or Byte-wide (parallel) | Altera Passive Serial / Altera Active Serial / JTAG (IEEE 1149.1) |
| Decompression | On-chip (supports compressed bitstreams) | — |
| JTAG / ISP Interface | IEEE 1532 (TCK, TMS, TDI, TDO) | — |
| Multi-Device Support | Yes (daisy-chain configuration) | — |
| User-Accessible Memory | Yes (unused flash available to user logic) | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - original Altera part may be non-RoHS SnPb finish] |
| Aras MSL | [DATA_NEEDED: MSL level] | 1 (per Partstack datasheet record) |
| Maximum Configuration Clock | — | 8 MHz |
| Supply Voltage (VCC) | — | 5.0 V (4.75 V to 5.25 V) |
| Programming Voltage (VPP) | — | 12.75 V (typical, factory-programmed via JTAG) |
| Kemasan | — | 20-pin PLCC (J-lead, 9x9 mm) |
| Kiraan Pin | — | 20 |
| Cascading Support | — | Yes (nCASC pin for multi-device daisy chain) |
| Endurance | — | OTP (one-time programmable, 1000 erase-equivalent UV cycles for pre-program erase) |
| JTAG Programming | — | Yes (in-system via IEEE 1149.1) |
| Compatible FPGA Families | — | FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury |