EPC2LI20 vs EPC1LI20 Karşılaştırma
Ayrıntılı yan yana karşılaştırma EPC2LI20 tarafından Altera ve EPC1LI20 tarafından AlteraAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.
Özellik Karşılaştırması
| Parametre | EPC2LI20 | EPC1LI20 |
|---|---|---|
| Marka | Altera | Altera |
| Kategori | Memory ICs | Memory ICs |
| Yaşam Döngüsü Durumu | NRND | Obsolete |
| Bellek Boyutu | 1.6 Mb (1,572,864 bits) | 1 Mb (1,048,576 bits) |
| Bellek Türü | Flash (in-system programmable) | OTP Configuration PROM (EPROM-based) |
| Programmable Type | In System Programmable (ISP) | — |
| Fonksiyon | Configuration PROM for SRAM-based FPGAs | — |
| Supply Voltage - Operating | 3.0 V to 3.6 V and 4.5 V to 5.5 V (auto-sensing) | — |
| İşletim Sıcaklığı | -40 C to +85 C (Industrial) | [DATA_NEEDED: operating temperature range] |
| Paket / Kas | 20-PLCC (J-lead, 9x9 mm) | — |
| Montaj Türü | Surface Mount (PLCC socket-compatible) | Surface Mount (PLCC socket compatible) |
| Configuration Interface | Serial or Byte-wide (parallel) | Altera Passive Serial / Altera Active Serial / JTAG (IEEE 1149.1) |
| Decompression | On-chip (supports compressed bitstreams) | — |
| JTAG / ISP Interface | IEEE 1532 (TCK, TMS, TDI, TDO) | — |
| Multi-Device Support | Yes (daisy-chain configuration) | — |
| User-Accessible Memory | Yes (unused flash available to user logic) | — |
| RoHS Durumu | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - original Altera part may be non-RoHS SnPb finish] |
| MSL Seviyesi | [DATA_NEEDED: MSL level] | 1 (per Partstack datasheet record) |
| Maximum Configuration Clock | — | 8 MHz |
| Supply Voltage (VCC) | — | 5.0 V (4.75 V to 5.25 V) |
| Programming Voltage (VPP) | — | 12.75 V (typical, factory-programmed via JTAG) |
| Paket | — | 20-pin PLCC (J-lead, 9x9 mm) |
| Pin Sayısı | — | 20 |
| Cascading Support | — | Yes (nCASC pin for multi-device daisy chain) |
| Endurance | — | OTP (one-time programmable, 1000 erase-equivalent UV cycles for pre-program erase) |
| JTAG Programming | — | Yes (in-system via IEEE 1149.1) |
| Compatible FPGA Families | — | FLEX 8000, FLEX 10K, ACEX 1K, APEX 20K, Mercury |