EPC4QC1C00N vs EPC4QC100 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC4QC1C00N disebabkan oleh Altera dan EPC4QC100 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPC4QC1C00N EPC4QC100
Merek Altera Altera
Kategori FPGA & CPLD Memory ICs
Status Lingkungan Hidup Obsolete Obsolete
Device Family Enhanced Configuration Device (EPC4) —
Memory Density 4 Mbit (4,194,304 bits) —
Supply Voltage (VCC) 3.0 V to 3.6 V (3.3 V typical) —
I/O Voltage Tolerance 3.3 V / 5 V tolerant —
Interface to FPGA Serial DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE —
Configuration Data Width 4-bit multiplexed on single DATA pin —
Kemasan 100-pin PQFP (QFP-100) 100-pin PQFP (20x14 mm)
Suhu Operasi -40 C to +85 C (industrial) 0C to +70C (commercial)
In-System Programming JTAG (IEEE 1149.1) —
Programming Voltage On-chip generated, no external VPP —
Page Mode Yes, multi-page storage supported —
Target FPGA Families Stratix, Cyclone, APEX, Mercury, ACEX —
Configuration Clock (DCLK) [DATA_NEEDED: DCLK max frequency] —
Aras MSL 3 (per JEDEC J-STD-020) —
Status RoHS [DATA_NEEDED: RoHS compliance status] unknown
Lead-Free [DATA_NEEDED: lead-free status] unknown
Fungsi — In-System Programmable Configuration PROM for FPGAs
Jenis Ingatan — Flash
Saiz Ingatan — 4 Mb
Supply Voltage (Core and I/O) — 3.3 V
Maximum Configuration Clock — 66 MHz
Antaramuka — Serial / Fast Passive (Altera FPGAs)
In-System Programmability — IEEE Std. 1532 compliant
JTAG Support — Yes (boundary scan + ISP via Jam STAPL)
nINIT_CONF Pin — Yes (triggers FPGA configuration via private JTAG instruction)
Jenis Pemasangan — Surface Mount
Compatible FPGA Families — Stratix, Cyclone, APEX, Mercury, ACEX

Laporan Datasheet & Sumber

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