EPM1270F256I5 vs EPM1270F256C5 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM1270F256I5 disebabkan oleh Altera dan EPM1270F256C5 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM1270F256I5 | EPM1270F256C5 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Device Family | MAX II | — |
| Series | EPM1270 | MAX II |
| Macrocell Count | 980 | — |
| Logic Elements | 1270 | — |
| User I/O Pins | 212 (max) | — |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Kemasan | 256-ball FBGA (FineLine BGA) | 256-ball FineLine BGA (FBGA-256) |
| Pin/Package Count | 256 | — |
| Process Technology | 0.18 µm | 0.18 µm |
| Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V | — |
| Maximum Internal Frequency | 201.1 MHz | — |
| Pin-to-Pin Delay (tPD) | 6.2 ns | — |
| Suhu Operasi | -40 °C to +100 °C (industrial, "I") | 0 °C to +85 °C (commercial, 'C' grade) |
| Speed Grade | 5 | — |
| Jenis Pemasangan | Surface Mount | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) / ISP via ByteBlaster / USB-Blaster |
| Status RoHS | [DATA_NEEDED: RoHS status] | Compliant |
| Family | — | EPM1270 |
| Macro Cells | — | 980 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Logic Delay (tPD) | — | 6.2 ns (C5 speed grade) |
| Internal Operating Frequency | — | 201.1 MHz |
| Core Supply Voltage | — | 2.5 V / 3.3 V |
| I/O Standards Supported | — | LVCMOS/LVTTL 1.8 V, 2.5 V, 3.3 V, 5.0 V (MultiVolt) |
| Configuration Memory | — | On-chip flash (non-volatile, instant-on) |