EPM240M100I5N vs EPM240GM100C5N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM240M100I5N disebabkan oleh Altera dan EPM240GM100C5N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N ✓ AktifPengandingan Spesifikasi
| Parametr | EPM240M100I5N | EPM240GM100C5N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Series | MAX II | — |
| Family | MAX II CPLD | MAX II G |
| Macro Cells | 192 | — |
| Logic Elements | 240 | 240 (192 macrocells) |
| Maximum Internal Frequency | 201.1 MHz | — |
| Propagation Delay (tPD) | 4.7 ns | — |
| On-die Non-volatile Memory | 8 Kbits | — |
| Process Technology | 0.18 µm, 6-layer metal flash | CMOS, Flash-based |
| Core Voltage | 2.5 V / 3.3 V | — |
| I/O Bank Voltages | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User I/O Pins | [DATA_NEEDED: user IO count for MBGA package] | — |
| Kemasan | 100-MBGA (Micro FineLine BGA) | 100-MBGA (Micro FineLine BGA), 6 x 6 mm |
| Suhu Operasi | -40 °C to +100 °C (industrial) | -40 C to +125 C |
| Programming Interface | JTAG (IEEE 1149.1) | JTAG (IEEE 1149.1) - ISP |
| Status RoHS | Compliant | — |
| Lead-Free | Yes | — |
| Jenis Pemasangan | Surface Mount (BGA) | Surface Mount (BGA) |
| User I/Os | — | 80 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| Ball Pitch | — | 0.5 mm |
| Supply Voltage - Core | — | 3.3 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) |
| Configuration Memory | — | Non-volatile Flash |
| Lead Free / RoHS | — | Yes / Compliant |
| Aras MSL | — | 3 |