EPM240T100C3N vs EPM240T100C4N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM240T100C3N disebabkan oleh Altera dan EPM240T100C4N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM240T100C3N EPM240T100C4N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif Aktif
Series MAX II —
Device Family MAX II CPLD (EPM240) —
Logic Elements (LE) 240 —
Macrocells 192 —
User I/O Pins 80 —
User Flash Memory (UFM) 8 Kbits —
Kemasan 100-pin TQFP (14x14 mm) —
Configuration Memory Internal Flash (non-volatile) —
Pin-to-Pin Logic Delay (tPD) 4.4 ns (typical) —
Maximum Operating Frequency 200 MHz (internal oscillator) —
Core Supply Voltage (VCCINT) 3.0 V to 3.6 V —
I/O Supply Voltage (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V —
Programming Interface JTAG (IEEE 1149.1) / ISP —
Suhu Operasi 0 °C to +85 °C (commercial) 0 °C to +85 °C (commercial, 'C' suffix)
Quiescent Current (typical) 35 mA —
Status RoHS Compliant Compliant (lead-free, 'N' suffix)
Jenis Pemasangan Surface Mount Surface Mount
Aras MSL [DATA_NEEDED: MSL rating] —
Family — MAX II
Device — EPM240
Macro Cells — 192
Logic Elements — 240
Propagation Delay (tPD) — 4.7 ns (max)
Maximum Frequency — 247.5 MHz
User I/O — 80
Supply Voltage - Internal — 2.5 V / 3.3 V
I/O Voltage (MultiVolt) — 1.5 V / 1.8 V / 2.5 V / 3.3 V
Process Technology — 0.18 µm
Programmable Type — In-System Programmable (Flash)
Kemasan / Case — 100-TQFP
JTAG Support — IEEE 1149.1 boundary-scan

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