EPM240T100C3N vs EPM240T100C4N 比較
詳細並排比較 EPM240T100C3N 由 Altera 與 EPM240T100C4N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM240T100C3N | EPM240T100C4N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Series | MAX II | — |
| Device Family | MAX II CPLD (EPM240) | — |
| Logic Elements (LE) | 240 | — |
| Macrocells | 192 | — |
| User I/O Pins | 80 | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| 封裝 | 100-pin TQFP (14x14 mm) | — |
| Configuration Memory | Internal Flash (non-volatile) | — |
| Pin-to-Pin Logic Delay (tPD) | 4.4 ns (typical) | — |
| Maximum Operating Frequency | 200 MHz (internal oscillator) | — |
| Core Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| 工作溫度 | 0 °C to +85 °C (commercial) | 0 °C to +85 °C (commercial, 'C' suffix) |
| Quiescent Current (typical) | 35 mA | — |
| RoHS 狀態 | Compliant | Compliant (lead-free, 'N' suffix) |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL rating] | — |
| Family | — | MAX II |
| Device | — | EPM240 |
| Macro Cells | — | 192 |
| Logic Elements | — | 240 |
| Propagation Delay (tPD) | — | 4.7 ns (max) |
| Maximum Frequency | — | 247.5 MHz |
| User I/O | — | 80 |
| Supply Voltage - Internal | — | 2.5 V / 3.3 V |
| I/O Voltage (MultiVolt) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Process Technology | — | 0.18 µm |
| Programmable Type | — | In-System Programmable (Flash) |
| 封裝 / 外殼 | — | 100-TQFP |
| JTAG Support | — | IEEE 1149.1 boundary-scan |