EPM3512AQC208-7 vs EPM3512AQC210-7 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3512AQC208-7 disebabkan oleh Intel dan EPM3512AQC210-7 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EPM3512AQC208-7 - MAX 3000A CPLD, 512 Macrocells, 7.5ns, 208-PQFP | Intel
EPM3512AQC208-7 NrndPengandingan Spesifikasi
| Parametr | EPM3512AQC208-7 | EPM3512AQC210-7 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | NRND |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 512 | 512 |
| Usable Gates | 10,000 | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Counter Frequency (fCNT) | 116.3 MHz | — |
| User I/Os | 172 | — |
| Logic Elements / LEs | N/A (CPLD macrocell architecture) | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Standards Supported | 5.0 V, 3.3 V, 2.5 V (MultiVolt I/O) | — |
| Kemasan | 208-Pin PQFP (FQFP, gull-wing) | PQFP-208 |
| Suhu Operasi | 0 C to +70 C (commercial) | [DATA_NEEDED: operating temperature range] |
| Programming | In-System Programmable via JTAG (IEEE Std. 1532) | — |
| Process Technology | CMOS EEPROM, 0.30 um | — |
| Status RoHS | Compliant | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | Yes | — |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 172 |
| Dedicated Input Pins | — | 12 |
| Kiraan Pin | — | 208 |
| Jenis Pemasangan | — | Surface Mount |
| Operating Voltage (Core) | — | 3.3 V |
| Min Supply Voltage | — | 3.0 V |
| Max Supply Voltage | — | 3.6 V |
| I/O Voltage Support | — | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) |
| Pin-to-Pin Delay | — | 7 ns (speed grade -7) |
| Speed Grade | — | 7 ns |
| In-System Programmability | — | Yes (JTAG, IEEE 1149.1) |
| Non-Volatile Configuration | — | Yes (EEPROM-based) |