EPM3512AQC210-7 vs EPM3512AFC256-7N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3512AQC210-7 disebabkan oleh Altera dan EPM3512AFC256-7N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EPM3512AFC256-7N - MAX 3000A CPLD, 512 Macrocells, 208 I/O | Altera
EPM3512AFC256-7N ObsoletePengandingan Spesifikasi
| Parametr | EPM3512AQC210-7 | EPM3512AFC256-7N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 172 | — |
| Dedicated Input Pins | 12 | — |
| Kemasan | PQFP-208 | 256-pin FineLine BGA (FBGA-256), 1.0 mm pitch |
| Kiraan Pin | 208 | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Operating Voltage (Core) | 3.3 V | — |
| Min Supply Voltage | 3.0 V | — |
| Max Supply Voltage | 3.6 V | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) | — |
| Pin-to-Pin Delay | 7 ns (speed grade -7) | — |
| Speed Grade | 7 ns | — |
| In-System Programmability | Yes (JTAG, IEEE 1149.1) | IEEE Std. 1532 compliant |
| Suhu Operasi | [DATA_NEEDED: operating temperature range] | 0 C to 70 C (commercial) |
| Non-Volatile Configuration | Yes (EEPROM-based) | — |
| Status RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 10,000 |
| User I/Os | — | 208 |
| Logic Blocks | — | 16 (32 macrocells each) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency (fMAX) | — | 116.3 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| 5V Tolerant I/O | — | Yes |
| Programming Interface | — | JTAG (IEEE 1149.1) |
| Process Technology | — | CMOS EEPROM, 0.30 um |