EPM5032DC-25 vs EPM5032JC-20 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5032DC-25 disebabkan oleh Altera dan EPM5032JC-20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5032DC-25 EPM5032JC-20
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Manufacturer Altera (Intel Programmable Solutions Group) —
Product Family MAX 5000 —
Device Type UV Erasable Programmable Logic Device (EPLD) —
Macrocells 32 32
Pin-to-Pin Propagation Delay (tPD) 25 ns —
Maximum Counter Frequency (fCNT) [DATA_NEEDED: maximum counter frequency] —
Setup Time (tSU) [DATA_NEEDED: setup time] —
Number of Dedicated Inputs 32 (in DIP-28 pinout) —
Number of I/O Pins 22 (in DIP-28 pinout, 4 used as dedicated inputs) —
Kemasan CDIP-28 (Windowed Ceramic DIP-28) 68-pin JLCC (windowed ceramic)
Process Technology CMOS, EPROM (UV-Erasable) CMOS
Architecture PAL-Type, Single-LAB, 32-Macrocell PAL-type AND-OR array with PIA interconnect
Output Structure Programmable I/O with output enable —
Flip-Flop Configuration D, T, JK, or SR (programmable) —
Suhu Operasi [DATA_NEEDED: operating temperature range] —
Status RoHS Lead Free / RoHS Compliant (per distributor listings) —
Programming Method UV erase + Altera/Intel MAX+PLUS II programmer —
Erasure Method UV light through ceramic window —
Product Type — UV-erasable Programmable Logic Device (PLD)
Family — MAX 5000
Logic Array Blocks (LABs) — 1
Product Terms (P-terms) — 320
Propagation Delay (tPD) — 20 ns
Frekuensi Klock Maksimum — 62.5 MHz
Setup Time — 10 ns
I/O Lines — 16 (bidirectional)
Dedicated Inputs — 8
Total Inputs — 24
Erase Method — UV (12V VPP + ultraviolet exposure)
Programming Voltage (VPP) — 12 V
Status Lingkungan Hidup — Obsolete (legacy Altera MAX 5000)

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