EPM5064JC-2 vs EPM5064JC1 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5064JC-2 disebabkan oleh Altera dan EPM5064JC1 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5064JC-2 EPM5064JC1
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 5000 MAX 5000
Macrocells 64 64
Logic Array Blocks (LABs) 4 4
Propagation Delay (tPD) 45 ns —
Maximum Clock Frequency (fMAX) 50 MHz —
Usable Gates 1250 1.25K
Dedicated Inputs 7 7
I/O Pins 28 28
Interconnect Programmable Interconnect Array (PIA) —
Technology CMOS, UV-erasable EPROM —
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) —
Programming Method UV-erase + EPROM programmer (not ISP) —
Kemasan 28-pin CLCC (J-lead, ceramic, windowed) 44-pin PLCC (J-Lead)
Suhu Operasi [DATA_NEEDED: commercial or industrial grade] —
Compliance RoHS status unknown (ceramic/J-lead windowed part, legacy product) —
Device Type — CPLD / EPLD (Erasable PLD)
Maximum Operating Frequency (fCNT) — 62.5 MHz
External Clock Input (max) — 50 MHz
Total Inputs — 36 (28 I/O + 7 dedicated + 1 clock)
Operating Voltage (VCC) — 5 V
Program Type — EPROM (one-time programmable, UV-erasable)
Process Technology — CMOS
Operating Temperature (JC suffix) — 0°C to +70°C (commercial)
Supply Current (ICC) — [DATA_NEEDED: ICC maximum]
Status RoHS — unknown
Lead-Free Status — unknown

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