EPM5064JC-2 vs EPM5064LC-2 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5064JC-2 disebabkan oleh Altera dan EPM5064LC-2 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM5064JC-2 | EPM5064LC-2 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Macrocells | 64 | 64 |
| Logic Array Blocks (LABs) | 4 | 4 |
| Propagation Delay (tPD) | 45 ns | 45 ns |
| Maximum Clock Frequency (fMAX) | 50 MHz | — |
| Usable Gates | 1250 | — |
| Dedicated Inputs | 7 | — |
| I/O Pins | 28 | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Technology | CMOS, UV-erasable EPROM | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 4.75 V to 5.25 V (5 V nominal) |
| Programming Method | UV-erase + EPROM programmer (not ISP) | Altera byte-wide / JTAG programmer |
| Kemasan | 28-pin CLCC (J-lead, ceramic, windowed) | PLCC-44 (J-Lead, plastic) |
| Suhu Operasi | [DATA_NEEDED: commercial or industrial grade] | -40 C to +85 C (commercial LC grade) [DATA_NEEDED: explicit min/max in source] |
| Compliance | RoHS status unknown (ceramic/J-lead windowed part, legacy product) | — |
| Device Family | — | MAX 5000 |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements per LAB | — | 16 |
| Number of Inputs | — | 36 (7 dedicated + 28 I/O) |
| Number of I/O Pins | — | 28 |
| Number of Flip-Flops | — | 28 |
| Maximum Internal Frequency | — | 40 MHz |
| Process Technology | — | CMOS, OTP EPROM (UV-erasable base) |
| Programmable Polarity | — | Yes |
| Programmable Output Enable | — | Yes, per macrocell |
| Jenis Pemasangan | — | Surface Mount |
| Status RoHS | — | [DATA_NEEDED: not specified in source] |