EPM5064JC-2 vs EPM5128GC Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5064JC-2 disebabkan oleh Altera dan EPM5128GC disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5064JC-2 EPM5128GC
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 5000 MAX 5000
Macrocells 64 128
Logic Array Blocks (LABs) 4 —
Propagation Delay (tPD) 45 ns —
Maximum Clock Frequency (fMAX) 50 MHz —
Usable Gates 1250 2,500
Dedicated Inputs 7 —
I/O Pins 28 —
Interconnect Programmable Interconnect Array (PIA) —
Technology CMOS, UV-erasable EPROM —
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) —
Programming Method UV-erase + EPROM programmer (not ISP) —
Kemasan 28-pin CLCC (J-lead, ceramic, windowed) —
Suhu Operasi [DATA_NEEDED: commercial or industrial grade] —
Compliance RoHS status unknown (ceramic/J-lead windowed part, legacy product) —
Logic Elements / LABs — [DATA_NEEDED: LAB count]
User I/Os — 68
Package Type — WPGA (Windowed Ceramic Pin Grid Array)
Package Code — WPGA
Number of Terminals — 68
Terminal Form — PIN/PEG (through-hole PGA with alignment pegs)
Package Shape — Square
Temperature Grade — Commercial
Supply Voltage (Vcc) — 5 V
Process Technology — CMOS, UV-erasable
Architecture — EPLD, programmable AND/OR array with fixed OR plane
Propagation Delay (tpd) — [DATA_NEEDED: tpd in ns]
Maximum Frequency (fmax) — [DATA_NEEDED: fmax in MHz]
Programmable Security Bit — Yes
Configuration Memory — Non-volatile UV-EPROM (windowed ceramic)
Jenis Pemasangan — Through-Hole (PGA socket required)
Status RoHS — [DATA_NEEDED: RoHS compliance]

Laporan Datasheet & Sumber

Lihat Semua Produk Buat BOQ Minta Bao Harga