EPM5192JC68 vs EPM5192JC1 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192JC68 disebabkan oleh Altera dan EPM5192JC1 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5192JC68 EPM5192JC1
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Device Family MAX 5000 —
Product Type EPLD (Erasable Programmable Logic Device) —
Logic Elements / Macrocells 192 macrocells —
User I/O Pins 76 —
Bilangan Pin 68 —
Package Type PLCC-68 (J-Lead) —
Suhu Operasi 0C to 70C (commercial, JC suffix) [DATA_NEEDED: operating temp range]
Tegangan Pemberi Arus [DATA_NEEDED: VCC] —
Pin-to-Pin Delay (tPD) [DATA_NEEDED: tPD] —
Maximum Frequency (fMAX) [DATA_NEEDED: fMAX] —
Configuration Memory UV-Erasable EPROM —
Programmable Interconnect Programmable Logic Array + Macrocells —
Dedicated Inputs 12 —
Clock Pins 4 dedicated —
Jenis Pemasangan Surface Mount (PLCC socket compatible) [DATA_NEEDED: surface mount or through-hole]
Status RoHS [DATA_NEEDED: RoHS compliance] unknown
Programming Tool MAX+PLUS II (legacy) —
Family — MAX 5000 (MAX 5xxx CPLD)
Manufacturer — Intel (formerly Altera Corporation)
Macro Cells — 192
Usable Gates — 3750
Maximum Operating Frequency — 62.5 MHz
Supply Voltage (VCC) — 5 V (nominal)
Process Technology — 0.5 µm CMOS, UV-erasable EPROM
Propagation Delay (typ) — [DATA_NEEDED: propagation delay in ns]
I/O Pins — [DATA_NEEDED: I/O pin count]
Kemasan — [DATA_NEEDED: exact package from datasheet]
Programming Interface — JTAG-compatible (Altera MAX 5xxx)
Logic Blocks (LABs) — 24 (8 macrocells per LAB)
AEC-Q100 — not_applicable
Lifecycle — Obsolete - last-time-buy stock only at franchised distributors

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