EPM9320ALC84-15 vs EPM9320ALC84-10 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9320ALC84-15 disebabkan oleh Altera dan EPM9320ALC84-10 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM9320ALC84-15 EPM9320ALC84-10
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family MAX 9000 CPLD MAX 9000
Macrocells 320 320
Usable Gates 6000 —
Propagation Delay (tPD) 16 ns —
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) —
User I/O 56 —
Logic Array Blocks (LABs) 16 16
Technology CMOS, EEPROM-based configuration CMOS EEPROM-based, third-generation MAX
Kemasan 84-pin PLCC (S-PQCC-J84, J-lead) 84-pin PLCC (J-Lead)
Jenis Pemasangan Through-hole / socket Surface Mount / Through-Hole (PLCC socket)
Programming Interface JTAG (IEEE 1149.1) / ISP —
Suhu Operasi -40C to +85C (industrial) [DATA_NEEDED: commercial/industrial grade]
Status RoHS [DATA_NEEDED: rohs status] [DATA_NEEDED]
Tingkat sensitiviti Air Nama (MSL) MSL-3 (168 hours per fpgalink.com) —
Lead-Free / Halogen-Free [DATA_NEEDED: lead free status] —
RoHS3 Compliance ROHS3 Compliant (per fpgalink.com listing) —
Device — EPM9320
Maximum User I/O Pins — 52
Dedicated Inputs — 16
Speed Grade — -10 (10 ns pin-to-pin delay)
Pin-to-Pin Delay (tPD) — 10 ns
Supply Voltage (VCCINT) — 5.0 V
In-System Programmability — 5.0 V ISP via IEEE 1149.1 JTAG
PCI Compliance — PCI Local Bus Specification Rev. 2.2 (speed grade -10)
Non-Volatile Configuration — Yes (EEPROM cell, powers up in known state)
Architecture — MAX (Multiple Array MatriX) with FastTrack Interconnect

Laporan Datasheet & Sumber

Lihat Semua Produk Buat BOQ Minta Bao Harga