EPM9320ARC208-10 vs EPM9320ALC84-10 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9320ARC208-10 disebabkan oleh Altera dan EPM9320ALC84-10 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EPM9320ARC208-10 EPM9320ARC208-10 - MAX 9000 CPLD, 320 Macro, 10ns | Altera

EPM9320ARC208-10 - MAX 9000 CPLD, 320 Macro, 10ns | Altera

EPM9320ARC208-10 ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EPM9320ARC208-10 EPM9320ALC84-10
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Masa Terakhir Dibeli Obsolete
Device Family MAX 9000 —
Product Type CPLD (Complex Programmable Logic Device) —
Macrocells 320 320
Usable Gates 6,000 —
Pin-to-Pin Delay (tPD) 10 ns 10 ns
Maximum Frequency 144.9 MHz —
Tegangan Pemberi Arus 5.0 V —
Logic Blocks (LABs) 16 —
Programmability EEPROM, in-system programmable via JTAG —
JTAG Support IEEE Std. 1149.1 compliant —
Speed/Power Optimization Per-macrocell programmable, 50% power mode available —
Kemasan RQFP-208 (Power Quad Flat Pack) 84-pin PLCC (J-Lead)
Jenis Pemasangan Surface Mount Surface Mount / Through-Hole (PLCC socket)
Suhu Operasi [DATA_NEEDED: operating temperature range] [DATA_NEEDED: commercial/industrial grade]
Status RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED]
Family — MAX 9000
Device — EPM9320
Logic Array Blocks (LABs) — 16
Maximum User I/O Pins — 52
Dedicated Inputs — 16
Speed Grade — -10 (10 ns pin-to-pin delay)
Supply Voltage (VCCINT) — 5.0 V
In-System Programmability — 5.0 V ISP via IEEE 1149.1 JTAG
Technology — CMOS EEPROM-based, third-generation MAX
PCI Compliance — PCI Local Bus Specification Rev. 2.2 (speed grade -10)
Non-Volatile Configuration — Yes (EEPROM cell, powers up in known state)
Architecture — MAX (Multiple Array MatriX) with FastTrack Interconnect

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