EPM9320ARC208-10N vs EPM9320RC208-20N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9320ARC208-10N disebabkan oleh Altera dan EPM9320RC208-20N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM9320ARC208-10N | EPM9320RC208-20N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 320 | 320 |
| Logic Gates | 6,000 gates | — |
| Logic Array Blocks (LABs) | 16 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Frequency | 144.9 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| User I/O Pins | 168 | 168 |
| Dedicated Input Pins | 12 | — |
| Kemasan | 208-pin RQFP (BFQFP with exposed pad) | 208-pin RQFP (PowerQuad II) |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Suhu Operasi | 0C to +70C (Commercial) | [DATA_NEEDED: operating temperature range] |
| Programming Interface | IEEE Std. 1149.1 JTAG | — |
| Configuration Memory | Non-volatile EEPROM | EEPROM (non-volatile) |
| Status RoHS | Compliant (lead-free 'N' suffix) | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 9000 |
| Logic Type | — | Complex Programmable Logic Device (CPLD) |
| Usable Gates | — | 6,000 |
| Logic Array Blocks | — | 20 |
| Maximum Pin-to-Pin Delay (tPD) | — | 20 ns |
| Maximum Operating Frequency | — | 100 MHz |
| Tegangan Pemberi Arus | — | 5.0 V |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Lead Finish | — | [DATA_NEEDED: lead finish] |
| Aras MSL | — | [DATA_NEEDED: MSL level] |