EPM9560GC280-20N vs EPM9560GC280-20 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9560GC280-20N disebabkan oleh Altera dan EPM9560GC280-20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM9560GC280-20N EPM9560GC280-20
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Architecture Multiple Array MatriX (MAX), 3rd generation —
Technology CMOS EEPROM-based —
Usable Gates 6,000 to 12,000 12,000
Macrocells 560 560
User I/O Pins 212 —
Pin-to-Pin Delay (tPD) 20 ns —
Maximum Counter Frequency 144 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V —
I/O Voltage 3.3 V or 5 V (configurable) 3.3 V or 5.0 V configurable
In-System Programmability Yes (5.0-V ISP via IEEE 1149.1 JTAG) —
Kemasan 280-pin CPGA (Ceramic Pin Grid Array) 280-pin CPGA (Ceramic Pin Grid Array)
Configuration Memory EEPROM (non-volatile, instant-on) —
PCI Compliance Yes —
Suhu Operasi [DATA_NEEDED: industrial/commercial grade] [DATA_NEEDED: commercial/industrial/military grade]
Status RoHS [DATA_NEEDED] [DATA_NEEDED: CPGA package historically contains Pb; likely non-compliant]
Maximum User I/O — 212
Pin-to-Pin Delay — 20 ns (speed grade -20)
Counter Frequency (max) — 100 MHz
Supply Voltage (VCCINT) — 4.75 V to 5.25 V (5.0 V nominal)
Process Technology — CMOS EEPROM
In-System Programming — Yes, via IEEE 1149.1 JTAG
Jenis Pemasangan — Through-Hole (CPGA socket)

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