EPM9560RC208-5 vs EPM9560RC208-10 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9560RC208-5 disebabkan oleh Altera dan EPM9560RC208-10 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM9560RC208-5 EPM9560RC208-10
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 560 —
Usable Gates 12,000 12,000
Logic Array Blocks (LABs) 16 16
Maximum User I/O 149 —
Dedicated Inputs 16 —
Flip-Flops 772 —
Propagation Delay (tPD) 5 ns —
Internal Counter Frequency (fCNT) 117.6 MHz —
Supply Voltage (VCC) 5.0 V —
Kemasan 208-pin RQFP (Plastic Quad Flat Pack) 208-pin RQFP (Plastic Quad Flat Pack)
Process Technology CMOS EEPROM 0.30 µm CMOS EEPROM
Programming Interface JTAG (IEEE Std 1149.1) + 5V ISP —
Suhu Operasi 0C to +70C (commercial) 0C to +70C (commercial)
Status RoHS Non-compliant (5V process, legacy RQFP) [DATA_NEEDED: not stated in retrieved distributor listings]
Macrocells — 560
Maximum User I/O Pins — 212 (208-pin package variant)
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Frequency (fMAX) — [DATA_NEEDED: internal toggle frequency in MHz]
Supply Voltage (VCCINT) — 5.0 V
I/O Standards Supported — 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O)
Configuration Memory — EEPROM (in-system programmable via JTAG)
Jenis Pemasangan — Surface Mount
Lead-Free — [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing]
Programmability — JTAG (IEEE 1149.1) in-system programming

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