EPM9560RC240-15N vs EPM9560RC240-15C Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9560RC240-15N disebabkan oleh Altera dan EPM9560RC240-15C disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM9560RC240-15N EPM9560RC240-15C
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Series MAX 9000 —
Family MAX 9000 (third-generation Multiple Array MatriX) MAX 9000
Usable Gates 12,000 12,000
Macrocells 560 560
Logic Array Blocks (LABs) 35 —
Maximum User I/O Pins 216 —
Pin-to-Pin Propagation Delay (tPD) 15 ns —
Internal Counter Frequency (fCNT) 145 MHz —
Global Setup Time (tFSU) [DATA_NEEDED: tFSU for -15 grade] —
Clock-to-Output Time (tFCO) [DATA_NEEDED: tFCO for -15 grade] —
Tegangan Pemberi Arus 5.0 V 5.0 V
Logic Family CMOS (EEPROM-based) —
Programmability In-system programmable (IEEE 1532/JTAG) —
Boundary-Scan Test JTAG (IEEE 1149.1) —
Suhu Operasi 0C to +70C (Commercial) 0C to +70C (Commercial)
Kemasan RQFP-240 (240-pin Plastic Quad Flat Pack) 240-pin RQFP (PowerQuad II)
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS [DATA_NEEDED: RoHS compliance - older Altera RQFP part] [DATA_NEEDED: RoHS status]
Device Type — EEPROM-based CPLD
Logic Array Blocks — 20
User I/O Pins — 187
Maximum Internal Frequency — 117.6 MHz
Propagation Delay (tPD) — 15 ns
Operating Voltage Range — 3.3 V or 5 V
Terminal Pitch — 0.5 mm
Configuration Technology — EEPROM (non-volatile)
In-System Programmability — Yes (ISP via JTAG)
JTAG Interface — IEEE 1149.1 boundary-scan
Process Technology — CMOS
Aras MSL — [DATA_NEEDED: MSL level]

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