EPM9560SRC208-7 vs EPM9560RC208-10 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9560SRC208-7 disebabkan oleh Altera dan EPM9560RC208-10 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM9560SRC208-7 EPM9560RC208-10
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family MAX 9000 MAX 9000
Device Type EPLD (Erasable Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 12,000 12,000
Macrocells 560 560
Logic Array Blocks (LABs) 16 16
Maximum I/O Pins 212 —
Kemasan 208-pin SQFP (Surface-mount Quad Flat Pack) 208-pin RQFP (Plastic Quad Flat Pack)
Pin-to-Pin Logic Delay (tPD) 7.0 ns —
Maximum Frequency (fCNT) [DATA_NEEDED: fCNT for -7 speed grade] —
Supply Voltage (VCC) 5.0 V (single supply) —
Programming Method In-system via IEEE Std 1149.1 JTAG —
Gambaran Suhu Operasi -40 °C to +85 °C (industrial) —
Technology CMOS, EEPROM-based —
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS [DATA_NEEDED: per part marking / distributor listing] [DATA_NEEDED: not stated in retrieved distributor listings]
Aras MSL [DATA_NEEDED: not stated in mature datasheet] —
Maximum User I/O Pins — 212 (208-pin package variant)
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Frequency (fMAX) — [DATA_NEEDED: internal toggle frequency in MHz]
Supply Voltage (VCCINT) — 5.0 V
I/O Standards Supported — 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O)
Configuration Memory — EEPROM (in-system programmable via JTAG)
Process Technology — 0.30 µm CMOS EEPROM
Suhu Operasi — 0C to +70C (commercial)
Lead-Free — [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing]
Programmability — JTAG (IEEE 1149.1) in-system programming

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