EPM9560WC208 vs EPM9560WC208-20 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9560WC208 disebabkan oleh Altera dan EPM9560WC208-20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM9560WC208 EPM9560WC208-20
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family MAX 9000 MAX 9000
Device Type EE Programmable Logic Device (CPLD) CPLD (EPLD)
Macrocells 560 560
Logic Array Blocks (LABs) 35 35
Flip-Flops 772 —
Maximum User I/O 149 —
Frekuensi Klock Maksimum 117.6 MHz —
Propagation Delay (tpd, -15 grade) 16.6 ns —
Tegangan Pemberi Arus 3.3 V or 5 V —
Process Technology CMOS, electrically erasable CMOS, EEPROM-based
Kemasan 208-pin CQFP (Ceramic Quad Flat Pack) PQFP-208 (RQFP/WQFP)
Terminal Pitch 0.50 mm —
Jenis Pemasangan Surface Mount Surface Mount
Programming Interface IEEE 1149.1 JTAG —
Configuration Memory Non-volatile EE (instant-on) —
Hot Socketing Support Yes —
Aras MSL [DATA_NEEDED: MSL level] [DATA_NEEDED]
Status RoHS [DATA_NEEDED: RoHS compliance] Non-compliant (legacy PQFP) [DATA_NEEDED: confirm from official doc]
User I/O Pins — 149
Maximum Propagation Delay (tPD) — 23.6 ns
Supply Voltage (VCCINT) — 5 V (typical, see datasheet)
I/O Voltage (VCCIO) — 3.3 V or 5 V (multi-voltage I/O)
In-System Programmability — Yes, JTAG BST (IEEE 1149.1)
Pin/Package Suffix — W = power PQFP; -20 = 23.6 ns speed grade
Suhu Operasi — Commercial (0C to +70C) [DATA_NEEDED: exact temp grade]
Lead-Free — [DATA_NEEDED]
Boson Bebas — [DATA_NEEDED]

Laporan Datasheet & Sumber

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