EPM9560WC208 vs EPM9560WC208-20 对比

详细并排对比 EPM9560WC208 出自 Altera 和 EPM9560WC208-20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560WC208 EPM9560WC208-20
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $125.00 $25.80
Family MAX 9000 MAX 9000
Device Type EE Programmable Logic Device (CPLD) CPLD (EPLD)
Macrocells 560 560
Logic Array Blocks (LABs) 35 35
Flip-Flops 772 —
Maximum User I/O 149 —
最大时钟频率 117.6 MHz —
Propagation Delay (tpd, -15 grade) 16.6 ns —
电源电压 3.3 V or 5 V —
Process Technology CMOS, electrically erasable CMOS, EEPROM-based
封装 208-pin CQFP (Ceramic Quad Flat Pack) PQFP-208 (RQFP/WQFP)
Terminal Pitch 0.50 mm —
安装类型 Surface Mount Surface Mount
Programming Interface IEEE 1149.1 JTAG —
Configuration Memory Non-volatile EE (instant-on) —
Hot Socketing Support Yes —
MSL 等级 [DATA_NEEDED: MSL level] [DATA_NEEDED]
RoHS 状态 [DATA_NEEDED: RoHS compliance] Non-compliant (legacy PQFP) [DATA_NEEDED: confirm from official doc]
User I/O Pins — 149
Maximum Propagation Delay (tPD) — 23.6 ns
Supply Voltage (VCCINT) — 5 V (typical, see datasheet)
I/O Voltage (VCCIO) — 3.3 V or 5 V (multi-voltage I/O)
In-System Programmability — Yes, JTAG BST (IEEE 1149.1)
Pin/Package Suffix — W = power PQFP; -20 = 23.6 ns speed grade
工作温度 — Commercial (0C to +70C) [DATA_NEEDED: exact temp grade]
Lead-Free — [DATA_NEEDED]
无卤 — [DATA_NEEDED]

数据手册与资源

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