MCIMX31CVMN4C vs MCIMX31LCVMN4C Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci MCIMX31CVMN4C disebabkan oleh NXP Semiconductors dan MCIMX31LCVMN4C disebabkan oleh NXP Semiconductors. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

NXP Semiconductors
MCIMX31CVMN4C MCIMX31CVMN4C - i.MX31 ARM1136 400MHz MPU, MAPBGA-473 | NXP

MCIMX31CVMN4C - i.MX31 ARM1136 400MHz MPU, MAPBGA-473 | NXP

MCIMX31CVMN4C ✗ Akhir Hayat
NXP Semiconductors
MCIMX31LCVMN4C MCIMX31LCVMN4C - i.MX31L ARM1136 400MHz MPU, MAPBGA-457 | NXP

MCIMX31LCVMN4C - i.MX31L ARM1136 400MHz MPU, MAPBGA-457 | NXP

MCIMX31LCVMN4C ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr MCIMX31CVMN4C MCIMX31LCVMN4C
Merek NXP Semiconductors NXP Semiconductors
Kategori Microcontrollers Microcontrollers
Status Lingkungan Hidup Akhir Hidup Masa Terakhir Dibeli
Core Architecture ARM1136JF-S (ARMv6, 32-bit) ARM1136JF-S
Maximum Core Clock 400 MHz —
Core Count 1 1
Bit Width 32-bit —
Kemasan 473-LFBGA / MAPBGA-473, 19 x 19 mm —
Product Family i.MX31 (Multimedia Applications Processor) —
Variant MCIMX31C (with on-chip graphics engine) —
Jazelle Technology Yes (Java bytecode acceleration) —
Memory Controller DDR / DDR2 SDRAM, NAND flash —
Display Interface Integrated LCD controller —
Image Sensor Interface CSI (Camera Sensor Interface) —
Connectivity Multiple serial interfaces (UART, SPI, I2C, USB) —
Suhu Operasi -40C to +85C (industrial) —
Jenis Pemasangan Surface Mount (BGA) Surface Mount
Status RoHS [DATA_NEEDED: RoHS compliance] Compliant
ITAR / Trade Restriction Subject to US ITC order (BGA-packaged i.MX31 family) —
Lebar Bus Data — 16-bit
Frekuensi Klock Maksimum — 400 MHz
Gambaran Suhu Operasi — -40C to +85C
Package Type — MAPBGA-457
Package Dimensions — 14 x 14 mm
Ball Pitch — 0.5 mm
Kiraan Pin — 457
Family — i.MX31L
Variant Suffix — N4C (industrial/auto temp grade)
Process Node — [DATA_NEEDED: process node]
L1 Cache — [DATA_NEEDED: L1 instruction/data cache]
L2 Cache — [DATA_NEEDED: L2 cache]
Integrated LCD Controller — Yes
USB Interface — USB 2.0 with on-chip PHY
Image Processing Unit (IPU) — Yes
AEC-Q100 Grade — Grade 3

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