MPC8247CZQTIEA vs MPC8247CVRTIEA557 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci MPC8247CZQTIEA disebabkan oleh NXP Semiconductors dan MPC8247CVRTIEA557 disebabkan oleh NXP Semiconductors. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

NXP Semiconductors
MPC8247CZQTIEA MPC8247CZQTIEA - PowerQUICC II 400MHz MPU, 516-PBGA | NXP

MPC8247CZQTIEA - PowerQUICC II 400MHz MPU, 516-PBGA | NXP

MPC8247CZQTIEA ✗ Akhir Hayat
NXP Semiconductors
MPC8247CVRTIEA557 MPC8247CVRTIEA557 - PowerQUICC II 400MHz MPU, PBGA-516 | NXP

MPC8247CVRTIEA557 - PowerQUICC II 400MHz MPU, PBGA-516 | NXP

MPC8247CVRTIEA557 Nrnd

Pengandingan Spesifikasi

Parametr MPC8247CZQTIEA MPC8247CVRTIEA557
Merek NXP Semiconductors NXP Semiconductors
Kategori Microcontrollers Microcontrollers
Status Lingkungan Hidup Akhir Hidup NRND
Manufacturer NXP Semiconductors NXP Semiconductors
Series PowerQUICC II —
Core Processor PowerPC G2_LE —
Core Architecture 32-bit Power Architecture PowerPC G2_LE
Core Count 1 1
Core Speed 400 MHz —
Kemasan 516-PBGA (TEPBGA) 27x27 mm 516-ball PBGA, 27x27 mm
Jenis Pemasangan Surface Mount (BGA) Surface Mount
Suhu Operasi -40C to +105C (Industrial) —
Tegangan Pemberi Arus 3.3 V core/IO —
Process Technology 0.13 um CMOS —
Integrated Peripherals CPM, PCI 2.2, USB 1.1, 2x 10/100 Ethernet MAC —
SDRAM Controller PC-133 SDRAM, 32-bit data —
DMA Channels 4 —
Ethernet Dual 10/100 MII/RMII MAC Dual 10/100 Mbps Fast Ethernet MACs (via CPM)
Status RoHS Compliant Compliant
Aras MSL 3 (per JEDEC J-STD-020) [DATA_NEEDED: MSL level]
Lifecycle End of Life (per NXP product page) —
Product Family — PowerQUICC II (MPC82xx)
Bit Width — 32-bit
Maximum Core Frequency — 400 MHz
Gambaran Suhu Operasi — -40 C to +105 C
Package Family — PBGA (Plastic Ball Grid Array)
Communications Processor Module (CPM) — Yes (integrated, with PCI, USB, Fast Ethernet MACs)
PCI Interface — 32-bit, up to 66 MHz
USB Interface — USB 1.1 (host and slave)
L1 Cache — 16 KB unified instruction/data
Lead-Free — Yes
AEC-Q100 — Not qualified
DDR Memory Controller — [DATA_NEEDED: DDR generation and width]

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