SN75LVDS84ADGG vs SN75LVDS84ADGGR Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci SN75LVDS84ADGG disebabkan oleh Texas Instruments dan SN75LVDS84ADGGR disebabkan oleh Texas Instruments. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Texas Instruments
SN75LVDS84ADGG - FlatLink 21:3 LVDS Transmitter | Texas Instruments
SN75LVDS84ADGG ✓ AktifTexas Instruments
SN75LVDS84ADGGR - 21:3 FlatLink LVDS Transmitter 48-TSSOP | TI
SN75LVDS84ADGGR ✓ AktifPengandingan Spesifikasi
| Parametr | SN75LVDS84ADGG | SN75LVDS84ADGGR |
|---|---|---|
| Merek | Texas Instruments | Texas Instruments |
| Kategori | Interface ICs | Interface ICs |
| Status Lingkungan Hidup | Aktif | Aktif |
| Fungsi | FlatLink Transmitter (LVDS Serializer) | LVDS FlatLink 21-bit transmitter (Serializer) |
| Number of Drivers | 4 (3 data + 1 clock) | 4 (3 data + 1 clock) |
| Kadar Data | 196 MBps (MegaBytes per second) | Up to 196 MBps (megabytes per second) |
| Parallel Inputs | 21 LVTTL data bits + 1 clock | — |
| Serial Outputs | 3 LVDS data pairs + 1 LVDS clock pair | — |
| Tegangan Pemberi Arus | 3.0 V to 3.6 V (3.3 V typical) | — |
| Supply Current (typical) | [DATA_NEEDED: ICC typical value] | — |
| LVDS Output Voltage Swing | [DATA_NEEDED: VOD differential swing] | — |
| LVTTL Input Voltage | [DATA_NEEDED: LVTTL input logic levels] | — |
| Clock Frequency Range | [DATA_NEEDED: parallel clock input range] | — |
| Propagation Delay | [DATA_NEEDED: tPLH / tPHL values] | Typical 2.5 ns |
| Suhu Operasi | 0°C to +70°C (Commercial) | — |
| Kemasan | 48-pin TSSOP (DGG) | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Aras MSL | [DATA_NEEDED: MSL rating] | 2 (1 year floor life) |
| Status RoHS | Compliant | Compliant |
| Data Channel Compression | 21:3 (21 bits serialized over 3 differential pairs) | — |
| Gambaran Tegangan Masukan | — | 3 V to 3.6 V (LVTTL single-ended) |
| LVDS Output Swing | — | Typical 350 mV differential |
| Number of Input Channels | — | 21 LVTTL data + 1 clock |
| Number of Output Channels | — | 3 LVDS data pairs + 1 LVDS clock pair |
| Common-Mode Range | — | 0 V to 2.4 V |
| Gambaran Suhu Operasi | — | 0 C to +70 C |
| Package Type | — | 48-TSSOP (DGG) |
| Lead-Free | — | Yes |
| Family | — | FlatLink |
| AEC-Q100 Qualified | — | No (use SN65LVDS84AQDGG for automotive) |