2SJ74-GR - P-Channel JFET Low-Noise Audio | Toshiba
MPN: 2SJ74-GR β End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $0 | $0.00 |
| 10 | $0 | $0.00 |
| 100 | $0 | $0.00 |
| 500 | $0 | $0.00 |
| 1,000 | $0 | $0.00 |
Drop-in alternatives for 2SJ74-GR β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
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2SJ74-GR/BL
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$1.55 / Unit
View Datasheet βLSJ74
β Drop-Inπ Reference alternative (not in catalog)
2SJ74-GR Maximum Ratings & Electrical Characteristics
| Polarity | P-Channel |
| Transistor Type | JFET (Junction Field-Effect Transistor) |
| Technology | Silicon P Channel Junction Type |
| Maximum Power Dissipation (PD) | 400 mW |
| Package | 2-5F1D (SC-43), 3 PIN |
| Number of Units in IC | 1 |
| Grade Suffix | GR (Idss grade classification) |
| Recommended Application | First stages of EQ amplifiers and M.C. head amplifiers |
| Mounting Type | Through Hole |
| Configuration | Single FET |
2SJ74-GR Pin Configuration
| Pin 1 | S (Source) β Source terminal of the P-channel JFET (per Toshiba 2SJ74 datasheet pin configuration; verify lead order against the datasheet diagram before assembly) |
| Pin 2 | G (Gate) β Gate terminal; reverse-biased PN junction controls channel conduction |
| Pin 3 | D (Drain) β Drain terminal; majority of package power dissipation occurs here |
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this component. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
2SJ74-GR is suitable for 6 applications: MC Phono Head Amplifier Input Stage, RIAA EQ Amplifier First Stage, Condenser Microphone Preamplifier, Discrete Op-Amp Input Differential Pair, Active Crossover and Tone Control Front Ends, Instrumentation and Measurement Front Ends.
MC Phono Head Amplifier Input Stage
The Toshiba 2SJ74-GR is explicitly recommended by the manufacturer for the first stage of MC (moving-coil) head amplifiers. Moving-coil cartridges deliver sub-millivolt signals from very low source impedances, so the input device must contribute negligible voltage noise and essentially zero gate current noise. As a P-channel junction FET, the 2SJ74-GR provides junction-leakage-only gate current, eliminating the base-current shot noise that plagues bipolar inputs. In a typical implementation, a pair of 2SJ74-GR devices forms the input differential pair of a head amplifier with a gain of 20 to 26 dB, running at a few milliamps each well below the 400 mW dissipation limit. Matching the GR-grade Idss between the two devices preserves offset and CMRR, and the GR grade allows a predictable bias point without per-device selection. Using genuine Toshiba die or the Linear Systems LSJ74 replacement keeps the noise floor below the cartridge output.
Recommended
RIAA EQ Amplifier First Stage
For RIAA-equalized phono preamplifiers, the first stage sets the entire signal chain's noise floor, and the Toshiba 2SJ74-GR is manufacturer-recommended for exactly this position. The RIAA feedback network places demanding load and gain requirements on the input device: it must deliver high transconductance at low drain current while contributing minimal 1/f noise in the 20 Hz to 20 kHz audio band. The junction-FET construction of the 2SJ74-GR provides low flicker noise corner and high input impedance, so the cartridge and RIAA network see a benign load. Implemented as a GR-grade differential pair with a current-mirror tail, the device operates at a few milliamps with tens of milliwatts dissipation, far within the 400 mW package rating. Because the 2SJ74 is end-of-life, designers of new EQ stages should verify stock or specify the Linear Systems LSJ74 direct replacement, which targets the same ultra-low-noise audio performance and TO-92-compatible footprint.
Recommended
Condenser Microphone Preamplifier
Studio condenser microphones and their outboard preamps benefit from the 2SJ74-GR's combination of high input impedance and low voltage noise. The capsule presents a very high source impedance, so gate leakage must be picoamp-level to avoid charging noise and low-frequency instability - conditions a junction FET satisfies naturally since its gate current is only PN-junction leakage. A single 2SJ74-GR used as a common-source or source-follower buffer, biased in its GR-grade Idss range, drives the balanced line stage with minimal added noise and distortion. Because drain currents are typically well under 5 mA, dissipation remains far below the 400 mW rating even in the compact microphone body, keeping self-heating drift negligible. For new microphone designs, the Linear Systems LSJ74 is the recommended in-production substitute, and matched pairs are available when a differential topology is preferred for improved power-supply rejection.
Recommended
Discrete Op-Amp Input Differential Pair
High-end discrete op-amps for audio frequently use a 2SJ74-GR P-channel JFET pair at the input to combine bipolar-like transconductance with JFET-like input impedance. Running the pair at 2 to 4 mA per device yields high open-loop gain while input bias current stays at junction-leakage levels, so feedback network values can be kept high without DC offset penalties. The GR Idss grading simplifies factory matching: selecting two devices from the same grade, or purchasing matched LSJ74 pairs, gives predictable offset and drift. With 400 mW package dissipation and typical operation at tens of milliwatts, thermal design is trivial in a TO-92 (2-5F1D / SC-43) footprint. Since Toshiba has discontinued the 2SJ74, new discrete op-amp designs should adopt the Linear Systems LSJ74, which Linear Systems specifies as a direct replacement and which is available as matched pairs for differential front ends.
Recommended
Active Crossover and Tone Control Front Ends
In active crossovers, EQ shelving stages, and tone-control circuits that follow a phono preamp, the 2SJ74-GR can serve as a low-noise input buffer or as the input pair of a discrete gain block. Its high input impedance lets designers use large-value potentiometers and coupling capacitor networks without loading-induced frequency-response errors, while its low gate current keeps DC offsets across coupling capacitors negligible. Operating from split supplies of roughly Β±15 V at a few milliamps, each device dissipates only tens of milliwatts against the 400 mW rating, so no heatsinking is needed in the 2-5F1D (SC-43) package. The GR grade's defined Idss window allows a single source-resistor value across a production run. Because the 2SJ74 is end-of-life, specify the Linear Systems LSJ74 - its officially designated direct replacement - for new board spins, keeping the same topology and bias networks intact.
Recommended
Instrumentation and Measurement Front Ends
Beyond consumer audio, the 2SJ74-GR suits low-level measurement front ends such as hydrophone, accelerometer, and photodiode transimpedance buffers, where the source impedance is high and added noise must be minimal. The junction FET's picoamp gate leakage prevents input bias-induced errors across the source, and its low 1/f noise corner preserves signal fidelity at low frequencies important for seismic and physiological sensing. Biasing within the GR-grade Idss window with source degeneration gives stable gain over temperature, and the modest 400 mW dissipation limit is easily respected at the microamp-to-milliamp currents typical of these circuits. In the 2-5F1D (SC-43) through-hole package the part is convenient for prototyping and low-volume instruments. For designs entering production today, the Linear Systems LSJ74 provides the same role with guaranteed ongoing supply, and Linear Systems matched pairs further reduce offset trim requirements.
Recommended
Recommended Products Summary
Engineering reference data for 2SJ74-GR β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | 2SJ74-GR/BL | LSJ74 |
|---|---|---|---|
| Package | 2-5F1D / SC-43 (TO-92 style), 3-pin | 2-5F1D / SC-43 (TO-92 style) - same | TO-92 compatible - same |
| Brand | Toshiba | Toshiba | Linear Systems |
| Polarity | P-Channel | P-Channel | P-Channel |
| Device Type | Silicon P-channel junction FET (JFET) | Silicon P-channel JFET | Ultra-low-noise P-channel JFET |
| Power Dissipation | 400 mW | 400 mW | [DATA_NEEDED] |
| Idss Grade | GR | BL (higher Idss window) | [DATA_NEEDED] |
| Lifecycle Status | End-of-life (legacy stock only) | End-of-life (legacy stock only) | Active production |
| Recommended Application | EQ amplifier / MC head amplifier first stages | Same (same datasheet) | Ultra-low-noise audio/acoustic applications (direct replacement) |
Key Differentiators
- Manufacturer-recommended for the most noise-critical position (vs Generic small-signal P-channel JFETs)
- Identical die with different Idss grading vs 2SJ74-GR/BL (vs 2SJ74-GR/BL)
- Production-continuity trade-off vs LSJ74 (vs LSJ74)
Design Notes
The 2SJ74 family is end-of-life, and marketplace channels carry widespread counterfeit and unlabeled TO-92 parts sold as '2SJ74 equivalents' - the diyAudio community reports receiving unmarked devices of unknown provenance. Source only from authorized distributors or brokers with lot traceability, or migrate new designs to the Linear Systems LSJ74, which the manufacturer designates as a direct replacement. Also note the GR suffix is an Idss grade, not a variant of the die: never mix GR and BL parts in a matched pair without re-measuring or purchasing factory-matched devices.
Keep drain current and supply voltage sized so that device dissipation stays comfortably below the 400 mW package rating. Estimated: at VDS = 15 V and ID = 4 mA, dissipation is only 60 mW - about 15% of the limit - leaving ample margin for signal swing. Estimated: dissipation would approach the limit only near VDS = 50 V and ID = 8 mA, conditions far outside typical audio input-stage biasing. At audio-stage dissipation levels no heatsink is required for the 2-5F1D (SC-43) package, but avoid thermally coupling the input pair to warm regulators to prevent offset drift.
For differential input pairs in phono and head-amplifier stages, place the two JFETs physically adjacent or in thermal contact so both die track temperature, and keep gate traces short and guarded to minimize leakage and hum pickup at the picoamp gate-current level. Use 1% or better resistors in source degeneration, and design the bias network around the GR grade Idss window from the Toshiba datasheet. For layout reuse, note the Linear Systems LSJ74 shares the 3-pin TO-92-style footprint, enabling drop-in substitution on existing boards after verifying lead order.
Compliance Information
Compliance status is not stated in the available distributor and datasheet data for this legacy Toshiba device. Legacy through-hole parts of this era may have tin-lead lead finishes; confirm with the distributor at time of RFQ.
