AD7687BCPZRL - 16-Bit 250kSPS Differential SAR ADC | Analog Devices
MPN: AD7687BCPZRL ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $14.5 | $14.50 |
| 10 | $13.05 | $130.50 |
| 100 | $11.62 | $1,162.00 |
| 500 | $10.45 | $5,225.00 |
| 1,000 | $9.3 | $9,300.00 |
AD7687BCPZRL Overview
A SAR ADC is a precision data converter that performs a binary search against the analog input using an internal capacitive DAC and comparator, returning fully-settled conversion results in a deterministic number of clock cycles. Within the broader converter hierarchy, the AD7687 belongs to the successive-approximation family, which sits between flash converters (fastest, lowest resolution) and sigma-delta converters (highest resolution, lowest bandwidth). SAR ADCs are widely favored in multiplexed data-acquisition systems, control loops, and precision instrumentation because of their deterministic latency, low latency to first valid sample, and lack of pipeline delay.
Key specifications for the AD7687BCPZRL include 16-bit resolution with no missing codes, 250 kSPS throughput, INL of +/-0.4 LSB typical and +/-1.5 LSB maximum, dynamic range of 96.5 dB, and signal-to-noise-plus-distortion (SINAD) measured at 20 kHz. The device accepts a true differential analog input and operates from a single 2.5 V to 5.5 V analog supply, with a separate VIO logic supply that allows 1.8 V, 2.5 V, 3.3 V, or 5 V digital interfacing without level shifters. The SPI-compatible serial interface supports 3-wire and 4-wire modes, optional BUSY indication through the SDI pin, and daisy-chaining of multiple converters on a single 3-wire bus.
Typical applications include industrial process control and PLC analog input modules, multichannel data-acquisition systems, medical instrumentation front-ends, and precision sensor signal chains. The combination of high dynamic range, low noise, and small 3 mm x 3 mm footprint also makes it well suited for portable battery-powered measurement equipment where PCB real estate is constrained.
When designing with the AD7687BCPZRL, place the decoupling capacitors as close as possible to the analog and digital supply pins, route the analog and digital grounds as separate planes joined at a single point beneath the exposed pad, and ensure that the REF pin is driven by a low-noise, low-drift reference such as the ADR45xx family to avoid degrading the converter's noise performance.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes that supplement the manufacturer datasheet and accelerate your evaluation of the AD7687BCPZRL for precision analog front-end designs.
Drop-in alternatives for AD7687BCPZRL — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with AD7687BCPZRL (same form factor and footprint) — differing in Package, Architecture, Input Type, Resolution, Sampling Rate.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
AD7687BCPZRL7
✅ Drop-In📋 Reference alternative (not in catalog)
AD7687ACPZRL7
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
AD7687BCPZRL
✅ Drop-In✓ In Stock
$9.3 / Unit
View Datasheet →AD7683BCPZRL
✅ Drop-In✓ In Stock
$7.09 / Unit
View Datasheet →AD7683ACPZRL
✅ Drop-In✓ In Stock
$5.45 / Unit
View Datasheet →AD7687BCPZRL Maximum Ratings & Electrical Characteristics
| Resolution | 16 bit |
| Number of Input Channels | 1 (differential) |
| Architecture | SAR (Successive Approximation Register) |
| Sampling Rate | 250 kSPS |
| Integral Nonlinearity (INL) | +/-0.4 LSB typ, +/-1.5 LSB max |
| Dynamic Range | 96.5 dB |
| SINAD | specified at 20 kHz input |
| Analog Supply Voltage | 2.5 V to 5.5 V |
| Digital I/O Supply (VIO) | 1.8 V / 2.5 V / 3.3 V / 5 V compatible |
| Input Type | True differential |
| Data Interface | SPI, QSPI, MICROWIRE, DSP-compatible serial |
| Operating Modes | CS Mode, 4-Wire with BUSY indicator, daisy-chain |
| Package | 10-pin LFCSP-WD (3 mm x 3 mm) with exposed pad |
| Mounting Type | Surface Mount |
| No Missing Codes | Guaranteed 16-bit |
AD7687BCPZRL Pin Configuration
| Pin 1 | VDD — Analog power supply (2.5 V to 5.5 V) |
| Pin 2 | VIO — Digital I/O supply voltage (1.8 V to 5 V) |
| Pin 3 | GND — Ground reference |
| Pin 4 | REF — External reference voltage input |
| Pin 5 | IN+ — Positive differential analog input |
| Pin 6 | IN- — Negative differential analog input |
| Pin 7 | CNV — Convert input / chip select (active low) |
| Pin 8 | SCK — Serial clock input |
| Pin 9 | SDO — Serial data output |
| Pin 10 | SDI — Serial data input (daisy-chain / BUSY indicator) |
Typical Applications
AD7687BCPZRL is suitable for 6 applications: Industrial Process Control and PLC Analog Input Modules, Multichannel Data-Acquisition Systems, Medical Instrumentation Front-End, Precision Sensor Signal Chains, Portable Battery-Powered Measurement Equipment, Control Loop and Motor Drive Feedback.
Industrial Process Control and PLC Analog Input Modules
The AD7687BCPZRL fits industrial process control and PLC analog input modules because its 250 kSPS throughput and 16-bit resolution provide enough bandwidth and accuracy to digitize multiplexed 4-20 mA, RTD, and thermocouple signal chains simultaneously across several channels. Placed behind a front-end instrumentation amplifier and multiplexer, the converter's true differential input rejects common-mode noise from long sensor cables typical of factory floors, while the 96.5 dB dynamic range preserves signal integrity over the 0-10 V or 4-20 mA industrial signal spans. The separate VIO supply simplifies interfacing with 1.8 V to 5 V industrial microcontrollers and FPGAs without external level shifters. Designers should pair the ADC with the ADR4525 reference for low-noise performance in noisy PLC cabinet environments.
Recommended
Multichannel Data-Acquisition Systems
The AD7687BCPZRL is well-matched to multichannel data-acquisition (DAQ) systems where its SAR architecture delivers deterministic latency and fast channel-to-channel settling. With 250 kSPS throughput and the ability to daisy-chain multiple ADCs on a single 3-wire SPI bus, one master host can digitize many channels while the optional BUSY indicator (via SDI) keeps the host synchronized without polling overhead. The 16-bit, no-missing-codes performance and +/-1.5 LSB INL translate directly into system-level DC accuracy, which matters when reconstructing multi-channel waveforms on a host PC. Using a 3 mm x 3 mm LFCSP package, the ADC keeps the per-channel board area small, enabling high channel density DAQ cards for test and measurement.
Recommended
Medical Instrumentation Front-End
In medical instrumentation front-ends such as patient monitors, ECG/EEG digitizers, and portable diagnostic devices, the AD7687BCPZRL provides the low-noise, high-resolution conversion required for biomedical signal acquisition. Its 96.5 dB dynamic range and 16-bit no-missing-codes performance allow the ADC to resolve microvolt-level bioelectric signals after front-end amplification, while the true differential input rejects common-mode 50/60 Hz interference picked up on long patient leads. The 2.5 V to 5.5 V analog supply and 1.8 V to 5 V VIO logic make it compatible with both battery-powered portable designs and line-powered bedside instruments. The small 3 mm x 3 mm LFCSP footprint supports the miniaturization required for wearable and handheld medical devices.
Recommended
Precision Sensor Signal Chains
The AD7687BCPZRL supports precision sensor signal chains for strain gauge, load cell, pressure transducer, and weigh-scale applications that demand high DC accuracy and low noise. With +/-0.4 LSB typical INL and 96.5 dB dynamic range, the converter digitizes low-level bridge outputs directly after a low-noise instrumentation amplifier, preserving the inherent accuracy of the sensor. The SAR architecture's deterministic conversion latency is helpful in closed-loop weighing or force-feedback systems where pipeline delay from a sigma-delta would complicate control-loop design. The exposed pad of the 10-pin LFCSP-WD package provides a low thermal resistance path, which is important when the ADC sits near heat-dissipating analog front-end components.
Recommended
Portable Battery-Powered Measurement Equipment
The AD7687BCPZRL fits portable battery-powered measurement equipment such as handheld multimeters, field data loggers, and condition-monitoring instruments that need precision ADC performance in a small footprint. The 2.5 V to 5.5 V analog supply allows direct operation from a single-cell Li-ion (with boost) or 3.3 V system rail, while the separate VIO rail interfaces cleanly with low-power microcontrollers running at 1.8 V to reduce overall system power. The 10-pin LFCSP-WD (3 mm x 3 mm) package keeps board area minimal, and power consumption scales linearly with throughput - so reducing the sample rate during idle periods extends battery life. Designers should follow the AD7687 datasheet's power-down and duty-cycling recommendations for lowest quiescent current.
Recommended
Control Loop and Motor Drive Feedback
The AD7687BCPZRL is well-suited to control-loop and motor-drive feedback paths where deterministic SAR latency avoids the group delay that sigma-delta converters introduce. In a digital current or voltage loop, the converter's single-cycle conversion produces a fresh 16-bit feedback value every 4 us at 250 kSPS, simplifying loop compensation and improving bandwidth. The true differential analog input rejects switching noise from the IGBT or MOSFET power stage, while the wide 1.8 V to 5 V VIO logic range allows direct connection to motor-control DSPs and FPGAs. The compact LFCSP package also fits inside the tight layout constraints of integrated motor-control PCBs where multiple ADCs sit close to the power stage.
Recommended
Recommended Products Summary
Engineering reference data for AD7687BCPZRL — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | AD7687BCPZRL7 | AD7687ACPZRL7 | AD7683BCPZRL | AD7683ACPZRL |
|---|---|---|---|---|---|
| Package | 10-LFCSP-WD (3x3) | 10-LFCSP-WD (3x3) - same | 10-LFCSP-WD (3x3) - same | 10-LFCSP-WD (3x3) - same | 10-LFCSP-WD (3x3) - same |
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Resolution | 16 bit | 16 bit | 16 bit | 16 bit | 16 bit |
| Sampling Rate | 250 kSPS | 250 kSPS | 250 kSPS | 100 kSPS | 100 kSPS |
| Architecture | SAR | SAR | SAR | SAR | SAR |
| Input Type | True differential | True differential | True differential | True differential | True differential |
| Analog Supply Voltage | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V | 2.5 V to 5.5 V |
| Logic Supply (VIO) | 1.8 V to 5 V | 1.8 V to 5 V | 1.8 V to 5 V | 1.8 V to 5 V | 1.8 V to 5 V |
| Pin Count | 10 | 10 | 10 | 10 | 10 |
Key Differentiators
- 250 kSPS throughput in 10-pin LFCSP-WD (vs AD7683BCPZRL)
- Separate VIO logic supply (1.8 V to 5 V) (vs Single-supply-only SAR ADCs)
- True differential input with 96.5 dB dynamic range (vs Pseudo-differential 16-bit ADCs)
- Optional BUSY indicator on SDI pin (vs ADCs without BUSY output)
Design Notes
Decouple VDD (analog supply) and VIO (digital I/O supply) with separate 10 uF ceramic bulk capacitors and 0.1 uF ceramic high-frequency bypass capacitors placed as close as possible to the respective pins. Power consumption of the AD7687BCPZRL scales linearly with sample rate, so reducing throughput during idle periods by stopping CNV toggling minimizes battery drain in portable designs. Use a low-noise LDO such as the ADP150 for VDD; noisy switching regulators near the ADC will degrade SINAD at the 20 kHz test frequency.
Route the analog input traces (IN+, IN-) as a true differential pair with controlled impedance, and keep them away from digital traces (CNV, SCK, SDO, SDI) to avoid coupling switching noise into the analog front end. The exposed thermal pad of the 10-pin LFCSP-WD must be soldered to a continuous ground plane to provide the lowest thermal resistance path and a low-impedance return for the REF decoupling capacitor. Join analog and digital grounds at a single point beneath the exposed pad; never split the ground plane under the ADC.
Drive REF with a low-noise, low-drift external reference such as the ADR4525 or ADR4550 and decouple it with a 10 uF ceramic capacitor plus a 0.1 uF ceramic at the REF pin. Reference noise directly appears as ADC output noise and will dominate SINAD when the analog input is small. For the best 96.5 dB dynamic range, also keep the input common-mode voltage near VREF/2 so the converter operates in its sweet spot for differential input swing.
Do not leave the SDI pin floating in 3-wire mode - tie it to VIO or GND according to the datasheet's CS-mode and 4-wire mode tables to avoid spurious BUSY-indicator behavior. Do not exceed the absolute maximum analog input range of +/-VREF on IN+ and IN-; overdrive causes long recovery times. In daisy-chain mode, ensure that the SCK idle state and CNV polarity match the host SPI controller's timing diagram in the AD7687 datasheet (Rev. E), or the chain will return shifted frame data.
Compliance Information
RoHS and lead-free compliance confirmed per the Analog Devices AD7687 product page. AEC-Q100 not applicable - this part is not automotive-qualified; check AD7687 automotive-grade variants on analog.com if needed.
