CS5534-ASZR - 24-Bit 4-Ch Delta-Sigma ADC | Cirrus Logic
MPN: CS5534-ASZR ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $4.72 | $4.72 |
| 10 | $4.44 | $44.40 |
| 100 | $4.11 | $411.00 |
| 500 | $3.82 | $1,910.00 |
| 1,000 | $3.55 | $3,550.00 |
Drop-in alternatives for CS5534-ASZR — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
CS5534-BSZR
✅ Drop-In✓ In Stock
$8.5 / Unit
View Datasheet →CS5532-ASZR
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View Datasheet →CS5533-ASZ
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$2.25 / Unit
View Datasheet →CS5531-ASZ
✅ Drop-In✓ In Stock
$3.98 / Unit
View Datasheet →CS5534-ASZR Maximum Ratings & Electrical Characteristics
| Resolution | 24 bit |
| Number of Input Channels | 4 (differential) |
| Converter Type | Sigma-Delta (charge-balance) |
| Output Word Rate | 3.84 kSPS |
| Analog Front End | Ultra-low-noise PGIA (programmable gain instrumentation amplifier) |
| Input Type | Differential |
| Interface | SPI (serial) |
| Analog Supply Voltage | 5 V |
| Package | 24-SSOP |
| Mounting Type | Surface Mount |
| Number of Pins | 24 |
| Packaging | Tape & Reel (R suffix) |
| Product Family | CS5531/CS5532/CS5533/CS5534 |
| Typical Applications | Weigh scale, process control, scientific and medical instrumentation |
CS5534-ASZR 24-ssop Pin Configuration Guide
Complete pinout information for CS5534-ASZR (24-ssop package) with 24 pins. This analog component features input, output, and power supply pins. Refer to the manufacturer datasheet for offset null, compensation, and enable pin configurations. Ideal for signal conditioning and amplifier circuits.
No detailed pinout data available for CS5534-ASZR.
Refer to the datasheet for full pin configuration.
Estimated pin count: 24 pins (analog package)
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this component. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
CS5534-ASZR is suitable for 6 applications: Weigh Scales and Load-Cell Measurement, Industrial Process Control, Scientific Instrumentation, Medical Diagnostic Equipment, Temperature Measurement with RTDs and Thermocouples, Battery-Powered Portable Data Acquisition.
Weigh Scales and Load-Cell Measurement
Weigh scales are a primary target application for the CS5534-ASZR. According to Cirrus Logic, the CS5531/32/33/34 family is optimized for measuring low-level unipolar or bipolar signals in weigh scale applications. Load-cell bridge outputs are typically in the range of a few millivolts full-scale at microvolt-per-count levels; the on-chip ultra-low-noise PGIA amplifies these signals directly without an external instrumentation amplifier, eliminating a discrete stage's offset drift and noise. The 24-bit resolution yields the counting resolution required for retail and platform scales, while the 3.84 kSPS word rate supports checkweigher update rates. Multiple differential input channels allow multi-load-cell designs to share one converter with an integrated mux.
Recommended
Industrial Process Control
The CS5534-ASZR digitizes low-level process signals such as pressure-transducer bridge outputs, thermocouple signals via cold-junction-compensated front ends, and 4-20 mA loop shunt voltages. Cirrus Logic explicitly lists process control among the family's target applications. The programmable gain instrumentation amplifier lets one hardware design cover multiple sensor sensitivities by changing gain registers over SPI instead of changing analog gain stages, simplifying product variants. The 24-bit resolution resolves fine pressure or temperature steps for control-loop quality, and the differential input architecture rejects common-mode noise typical of industrial cable runs. The 3.84 kSPS rate exceeds the bandwidth needs of most thermal and pressure control loops.
Recommended
Scientific Instrumentation
Scientific instruments measuring low-level signals - photodiode outputs, ionization-chamber currents via transimpedance stages, and bridge-based laboratory sensors - benefit from the CS5534-ASZR's ultra-low-noise analog front end. The charge-balance delta-sigma architecture achieves 24-bit performance that resolves microvolt-level signals, and the integrated PGIA reduces component count in instruments where channel density matters. The four differential channels allow simultaneous-ish multiplexed acquisition of reference and measurement signals for ratiometric cancellation of excitation drift, a common technique in laboratory bridge measurements. The SPI interface connects cleanly to any microcontroller or FPGA sequencer used for instrument timing and data logging.
Recommended
Medical Diagnostic Equipment
Medical instrumentation - patient scales, diagnostic analyzers, and biosignal acquisition front ends - is an application domain Cirrus Logic explicitly targets with the CS5531/32/33/34 family. The ultra-low-noise PGIA preserves weak physiological and bioanalytical signals, and the differential topology rejects common-mode interference from surrounding hospital equipment. In analyzer optics and flow-cytometry detectors, the 24-bit resolution captures wide dynamic-range photometric signals without gain ranging, and the 3.84 kSPS rate is ample for chemical assay kinetics. Four multiplexed channels let one converter serve multiple detector or electrode channels, reducing per-channel cost in multi-parameter benchtop and point-of-care diagnostic platforms.
Recommended
Temperature Measurement with RTDs and Thermocouples
The CS5534-ASZR suits precision temperature measurement using RTD bridges and thermocouples. RTD bridges produce low-level differential outputs where excitation-current drift can be cancelled ratiometrically by measuring the reference channel through a second CS5534 input - the integrated 4-channel mux makes this technique practical in one converter. Thermocouple microvolt-level Seebeck signals are amplified by the PGIA's low-noise gain stages without adding measurable thermal noise. The 24-bit resolution distinguishes sub-degree temperature steps needed for process calibration and laboratory-grade measurement, while the 3.84 kSPS output word rate comfortably exceeds the thermal time constants of RTD and thermocouple probes.
Recommended
Battery-Powered Portable Data Acquisition
The CS5534-ASZR integrates the instrumentation amplifier, mux, and delta-sigma modulator in one 24-SSOP device, which reduces board area and component count for portable and battery-powered data-acquisition nodes. Fewer discrete analog stages mean fewer sources of offset drift that would otherwise require periodic field calibration, an important operational benefit for deployed loggers. The SPI serial interface connects to low-power microcontrollers, and the moderate 3.84 kSPS rate permits duty-cycled acquisition where the converter runs only during sampling windows to conserve energy. Differential inputs reject ground-bounce noise in single-supply portable systems, preserving the low-noise performance across the full measurement path.
Recommended
Recommended Products Summary
Engineering reference data for CS5534-ASZR — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | CS5534-BSZR | CS5532-ASZR | CS5533-ASZ | CS5531-ASZ |
|---|---|---|---|---|---|
| Package | 24-SSOP | 24-SSOP - same | 24-SSOP - same | 24-SSOP - same | 24-SSOP - same |
| Brand | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic | Cirrus Logic |
| Resolution | 24 bit | 24 bit | 24 bit | 16 bit | 16 bit |
| Input Channels | 4 differential | 4 differential | 2 differential | 4 differential | 2 differential |
| Output Word Rate | 3.84 kSPS | 3.84 kSPS | 3.84 kSPS | [DATA_NEEDED] | [DATA_NEEDED] |
| PGA Front End | Ultra-low-noise PGIA | Ultra-low-noise PGIA | Ultra-low-noise PGIA | Ultra-low-noise PGIA | Ultra-low-noise PGIA |
| Interface | SPI (serial) | SPI (serial) | SPI (serial) | SPI (serial) | SPI (serial) |
| Packaging Format | Tape & Reel (R) | Tape & Reel (R) | Tape & Reel (R) | Tray/Tube (Z) | Tray/Tube (Z) |
| Performance Grade | A grade | B grade | A grade | A grade (16-bit tier) | A grade (16-bit tier) |
Key Differentiators
- Full 4-channel capability at 24-bit resolution (vs CS5532-ASZR)
- Highest resolution in the same footprint (vs CS5533-ASZ)
- Ultra-low-noise integrated PGIA (vs AD7124-8)
Design Notes
Partition the PCB into analog and digital ground regions joined at a single star point under the converter. The CS5534's ultra-low-noise PGIA means the front end resolves microvolt-level signals, so ground-plane noise from SPI return currents can dominate the noise budget if allowed to cross analog regions. Keep the voltage reference traces short and guarded, and place the 5 V analog supply decoupling (typically 0.1 uF ceramic plus bulk capacitance) directly at the VA+ pin. Follow the layout guidance in the manufacturer datasheet's typical application section for the weigh-scale reference design.
The SPI interface should use series termination (22-33 ohm) on SCLK and SDIO lines if trace lengths exceed a few centimeters, since ringing on clock edges can cause marginal setup/hold timing at the converter. Route the SPI bus away from the analog input traces; a switching digital line capacitively coupled into a PGIA input appears as input-referred noise that the 24-bit resolution will faithfully digitize. For multiplexed channels, allow digital-filter settling time after each channel switch before accepting conversion data.
Do not treat the CS5534 as a general-purpose high-speed ADC: at a 3.84 kSPS maximum word rate it targets static and quasi-static measurements, and forcing high channel-scan rates leaves insufficient filter settling per conversion, degrading effective resolution. Also note the CS5534 has no cross-brand pin-to-pin replacement - designs requiring second sources should plan a socket-compatible footprint strategy early. When substituting the 16-bit CS5533 for cost reduction, revalidate the system accuracy budget, since 16 bits yield roughly 65,536 counts versus the CS5534's 16.7 million.
Supply the analog section from a clean low-noise 5 V rail; a switching regulator's ripple feeding VA+ appears at the ADC output as spurs unless heavily post-filtered. Estimated: a linear post-regulator with even 40 dB of ripple rejection at the switching frequency reduces a 50 mV ripple to 0.5 mV, preserving the converter's noise floor. Sequence the analog and digital supplies per the manufacturer datasheet's power-supply recommendations and verify the digital interface level compatibility (VDD domain) against the host controller before layout.
Compliance Information
RoHS, REACH, lead-free and halogen status not stated in the verified web data retrieved for this part; confirm via Cirrus Logic product page or request material declarations through XAIPART before compliance-critical orders.
