DP83867CRRGZT - Gigabit Ethernet PHY | Texas Instruments
MPN: DP83867CRRGZT ✓ ActiveDP83867CRRGZT Overview
An Ethernet physical-layer transceiver, commonly called an Ethernet PHY, converts logical data transmitted by a media-access controller into electrical signals suitable for copper cabling. The PHY belongs to the network-interface hierarchy: Ethernet controller > Ethernet PHY > 10/100/1000 Base-T interface > physical-layer transceiver. Integrating the physical medium, physical coding, and physical data sublayers allows the host controller to communicate through standardized Ethernet protocols.
The DP83867CRRGZT combines robust Gigabit Ethernet operation with low power consumption and a compact 48-VQFN package. Its RGMII and SGMII interfaces provide flexible connections to controllers with different internal architectures. The device also supports cable diagnostics, IEEE 1588 start-of-frame support, and JTAG 1149.1, according to the available manufacturer and comparison data. A 7 mm by 7 mm package supports compact industrial and network equipment designs.
The CRRGZT ordering option is associated by the verified product information with a 48-pin VQFN (RGZ) package and an operating-temperature range of 0 °C to 70 °C. Its three principal operating supply voltages are 1.8 V, 2.5 V, and 3.3 V. Detailed electrical limits, clock requirements, register defaults, magnetic-component recommendations, and timing margins must be taken from the manufacturer datasheet before layout release.
Typical applications include industrial Ethernet controllers, automated machinery, network switches, embedded Linux systems, test equipment, and industrial IoT gateways. The device is particularly relevant when a board needs 10/100/1000-Mbps copper Ethernet and the host controller supports RGMII or SGMII. For an RMII-only controller, the verified comparison information states that a bridging translator such as the Microchip LAN9354 is required.
A critical design consideration is interface timing: RGMII clock and data paths must meet the required setup and hold windows, while the copper-channel magnetics, center taps, and termination network must follow the reference design. PCB layout should separate high-speed digital clocks from analog receive circuitry and provide a low-impedance, continuous return path beneath the PHY and magnetics.
This page consolidates verified manufacturer and distributor information, supported PHY variants, interface-selection guidance, and practical integration considerations. It distinguishes documented facts from electrical details that still require confirmation from the current Texas Instruments datasheet, helping engineers evaluate the DP83867CRRGZT without relying on an unverified cross-reference listing.
Drop-in alternatives for DP83867CRRGZT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DP83867CRRGZT (same form factor and footprint) — differing in Package, Cable Diagnostics, Product Type, ESD Protection, IEEE 1588 Support.
DP83867CSRGZT
✅ Drop-InContact for price
View Datasheet →DP83867CSRGZR
✅ Drop-InContact for price
View Datasheet →DP83867CRRGZR
✅ Drop-In📋 Reference alternative (not in catalog)
DP83867CRRGZT Specifications
| Product Type | 10/100/1000 Base-TX Ethernet physical-layer controller |
| Supported Ethernet Rates | 10 Mbps, 100 Mbps, and 1 Gbps |
| Supported Physical Layer Modes | 10BASE-T, 100BASE-TX, and 1000BASE-T |
| Host Interface | RGMII and SGMII |
| Number of Ports | 1 Ethernet port |
| Supply Voltage Options | 1.8 V, 2.5 V, and 3.3 V |
| Package | 48-pin VQFN (RGZ), 7 mm x 7 mm |
| Mounting Type | Surface mount |
| Operating Temperature Range | 0 °C to 70 °C |
| Cable Diagnostics | Supported |
| IEEE 1588 Support | Start-of-frame support |
| Debug Interface | JTAG 1149.1 |
| ESD Protection | Exceeds 8 kV IEC 61000-4-2 for direct contact |
| Power Class | Low-power Gigabit Ethernet PHY transceiver |
DP83867CRRGZT 48-pin vqfn (rgz), 7 mm x 7 mm Pin Configuration Guide
Pin configuration for DP83867CRRGZT (48-pin vqfn (rgz), 7 mm x 7 mm package). Pin numbering, functions, and connection diagrams are defined in the manufacturer datasheet. Refer to it for the exact footprint and soldering guidelines.
No detailed pinout data available for DP83867CRRGZT.
Refer to the datasheet for full pin configuration.
Typical Applications
DP83867CRRGZT is suitable for 6 applications: Industrial Ethernet Equipment, Automated Machinery Controllers, Embedded Linux Network Gateway, Network Switch Line Card, Test and Measurement Instrument, Industrial IoT Edge Gateway.
Industrial Ethernet Equipment
The DP83867CRRGZT fits industrial network equipment that requires 10/100/1000-Mbps copper Ethernet in a compact 48-VQFN (RGZ) footprint. Its RGMII and SGMII interfaces allow connection to a capable industrial controller or network processor without requiring a separate PHY on the main board. The verified product information identifies the device as a low-power, robust Gigabit PHY, while its 8 kV direct-contact IEC 61000-4-2 performance supports rugged port design. The commercial 0 °C to 70 °C grade is appropriate where the enclosure does not require an extended-temperature part. Layout must follow the TI reference design, preserve interface timing, and implement the specified magnetic-component network.
Recommended
Automated Machinery Controllers
The DP83867CRRGZT is suitable for automation controllers and machine-control gateways that need a single high-speed copper Ethernet port. Supporting 10BASE-T, 100BASE-TX, and 1000BASE-T allows one physical design to negotiate across common industrial link speeds, while RGMII or SGMII connects the PHY to the controller’s Ethernet subsystem. In this application, board area is valuable, so the 48-pin VQFN (RGZ) package in a 7 mm by 7 mm land pattern helps conserve routing space. The designer should account for the 0 °C to 70 °C CRRGZT temperature grade and verify all supply rails, strap settings, magnetics, and isolation requirements before production.
Recommended
Embedded Linux Network Gateway
The DP83867CRRGZT can provide the copper Ethernet physical layer for an embedded Linux gateway when its processor or controller supports RGMII or SGMII. The PHY handles 10/100/1000-Mbps link negotiation while the host manages the network stack, addressing, and application traffic. SGMII can simplify connections to controllers designed for serial Gigabit Ethernet, whereas RGMII offers a parallel interface where timing and routing are carefully controlled. The verified manufacturer data identifies the device as low-power, supporting power-conscious gateway designs, and the 7 mm by 7 mm RGZ package leaves board area for processors, memory, and storage. Firmware configuration must match the strap settings and internal-delay selection used by the hardware design.
Recommended
Network Switch Line Card
A multiport Ethernet line card can use the DP83867CRRGZT for each copper port, with each PHY connecting an RGMII or SGMII interface to a switching fabric. Its support for 10BASE-T through 1000BASE-T allows the line card to accommodate legacy and Gigabit links while maintaining one physical-layer design. The 48-VQFN package is useful in dense switch hardware, although magnetics and routed differential copper channels can dominate the available area. Designers should use the manufacturer reference layout for supply filtering and analog grounding, maintain RGMII or SGMII timing margins, and verify that thermal performance remains acceptable when multiple PHYs operate near their maximum load in one chassis.
Recommended
Test and Measurement Instrument
The DP83867CRRGZT is appropriate for test and measurement equipment requiring a network port for remote control, data logging, or instrument management. The 10/100/1000-Mbps support enables connection to laboratory and plant networks, while RGMII or SGMII provides a choice of host-interface architectures. The commercial temperature rating of 0 °C to 70 °C covers typical indoor instrument environments, but enclosure heating can raise the temperature near the PHY and should be included in thermal checks. The design must isolate copper-network transients from sensitive measurement circuitry and implement the specified isolation and magnetic components. Verified compliance must be checked against the complete instrument rather than inferred solely from the PHY’s component-level ESD claim.
Recommended
Industrial IoT Edge Gateway
The DP83867CRRGZT supports industrial IoT edge gateways that bridge local sensors and machinery to an Ethernet backhaul. A single PHY can provide backward-compatible 10/100/1000-Mbps connectivity over copper, reducing the number of physical network interfaces required on a compact gateway. Its RGMII and SGMII options allow selection according to the host processor, while the low-power designation is beneficial in continuously powered installations. The 7 mm by 7 mm package is compatible with dense edge hardware, but the commercial 0 °C to 70 °C rating limits deployment in unheated outdoor enclosures without thermal qualification. Ethernet magnetics, surge protection, chassis grounding, and internal-delay configuration must be validated together.
Recommended
Recommended Products Summary
Engineering reference data for DP83867CRRGZT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DP83867CSRGZT | DP83867CSRGZR | DP83867CRRGZR |
|---|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Package | 48-VQFN (RGZ), 7 mm x 7 mm | 48-VQFN (RGZ), 7 mm x 7 mm | 48-VQFN (RGZ), 7 mm x 7 mm | 48-VQFN (RGZ), 7 mm x 7 mm |
Key Differentiators
- Compact 48-pin implementation with broad copper-Ethernet support (vs DP83867CSRGZT)
- RGMII and SGMII host-interface support (vs DP83867CRRGZR)
- Verified direct-contact ESD immunity (vs DP83867CSRGZR)
- Single-package support for 10BASE-T through 1000BASE-T (vs DP83867ISRGZR)
Design Notes
Use the manufacturer reference layout and verify RGMII or SGMII setup and hold timing with the actual host controller, PHY clock configuration, board stack-up, and selected internal delay. The verified comparison information notes that internal delay can be configured through strap pins or software. Treat the strap state as part of the hardware contract: changing delay in firmware cannot correct an incorrect boot-time configuration without confirming that the PHY latches the intended value and that the controller timing budget remains valid.
Follow the TI reference layout for the DP83867CRRGZT, including analog-supply decoupling, grounding, and placement of the PHY and network magnetics. Maintain a continuous ground plane beneath the high-speed interface and place decoupling connections directly at the relevant supply pins. Route clock and data traces with matched geometry and controlled length, keep the RGMII or SGMII routing away from the analog receive section, and avoid introducing test pads or unrelated high-current paths that compromise return-path continuity.
Do not assume that an RMII-only controller can connect directly to the DP83867CRRGZT. The verified comparison data identifies the Microchip LAN9354 as a possible RMII bridging translator, illustrating that protocol-interface compatibility is distinct from basic Ethernet speed compatibility. Also confirm that the host controller supports the selected RGMII or SGMII mode, that the strap pins agree with the board configuration, and that the chosen suffix provides the required temperature grade before releasing a PCB or production order.
The DP83867 family is described by Texas Instruments as optimized for ESD protection and exceeding 8 kV IEC 61000-4-2 for direct contact. Component-level immunity does not guarantee compliance of the finished product. Use the specified Ethernet magnetics and protection network, connect shield and chassis-ground paths according to the reference design, and validate the completed port with the intended cable, enclosure, grounding system, and installation geometry.
The verified data identifies 1.8 V, 2.5 V, and 3.3 V supply options, but it does not include per-rail current limits or sequencing conditions. Use separate local bypass networks and verify startup, shutdown, and load-transient behavior against the current manufacturer datasheet. Do not derive rail-budget or thermal limits from the distributor summary; obtain the detailed electrical characteristics and reference circuit before finalizing rail capacity, regulator selection, or board power loss.
Compliance Information
The supplied data explicitly identifies IEC 61000-4-2 direct-contact ESD immunity exceeding 8 kV for the DP83867 family. Separate RoHS, REACH, AEC-Q100, lead-free, halogen-free, and conflict-minerals declarations were not included in the supplied verified data.
