DP83TC813S-Q1 - 100BASE-T1 Automotive Ethernet PHY | TI
MPN: DP83TC813S-Q1 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $3.95 | $3.95 |
| 10 | $3.55 | $35.50 |
| 100 | $3.12 | $312.00 |
| 500 | $2.79 | $1,395.00 |
| 1,000 | $2.45 | $2,450.00 |
DP83TC813S-Q1 Overview
An Ethernet PHY (physical layer transceiver) is the IC that converts digital MAC frames into analog signals suitable for transmission over a physical medium - in this case a single unshielded twisted pair as defined by 100BASE-T1. PHYs sit at the lowest layer of the automotive network hierarchy, bridging the vehicle ECU domain controller or gateway to the in-vehicle Ethernet backbone used for ADAS sensors, infotainment, and body electronics.
Key differentiating features include the SGMII media-independent interface for direct connection to Ethernet MACs and switches, configurable I/O voltages of 3.3 V, 2.5 V, and 1.8 V for flexible processor compatibility, and an integrated low-pass filter that eliminates external filtering components while achieving Level IV emissions compliance. The TC-10 < 20 uA sleep current makes the device suitable for always-on, partially-networked vehicle domains that must meet stringent parked-vehicle power budgets.
Technically, the DP83TC813S-Q1 uses a 25 MHz crystal reference (tolerance -100 to +100 ppm, ESR up to 100 ohm per the timing requirements table) and includes a pseudo-random binary sequence (PRBS) frame generation tool fully compatible with internal loopbacks, enabling transmit and receive test traffic without a MAC attached - a significant advantage for production-line ECU test and EMC pre-compliance. SAE J2962-3 EMC compliance further reduces automotive qualification risk.
Typical applications include automotive gateways, ADAS camera and radar domains, zonal controllers, and infotainment head units that route 100BASE-T1 links through an SGMII-connected switch or SoC.
For design-in, ensure the 25 MHz crystal meets the datasheet stability requirement over temperature and aging, and configure the I/O supply rail to match the host processor bank voltage.
This page synthesizes distributor availability, drop-in family alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for DP83TC813S-Q1 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DP83TC813R-Q1
✅ Drop-In📋 Reference alternative (not in catalog)
DP83TC811-Q1
✅ Drop-In📋 Reference alternative (not in catalog)
DP83TC813S-Q1 Specifications
| Interface | SGMII |
| Network Standard | IEEE 802.3bw 100BASE-T1 |
| Compliance | Open Alliance, TC-10 compliant |
| Sleep Current | < 20 uA (TC-10) |
| Package | 28-pin VQFN (5.00 mm x 4.00 mm), wettable flank |
| I/O Voltages | Configurable: 3.3 V, 2.5 V, 1.8 V |
| EMC Standard | SAE J2962-3 compliant |
| Emissions Performance | Level IV with integrated LPF |
| Automotive Qualification | AEC-Q100 qualified |
| Crystal Frequency | 25 MHz |
| Crystal Tolerance | -100 ppm to +100 ppm over temperature and aging |
| Crystal ESR (max) | 100 ohm |
| Test Features | PRBS frame generation with internal loopbacks (MAC-less test) |
| Mounting Type | Surface Mount |
DP83TC813S-Q1 28-pin vqfn (5.00 mm x 4.00 mm), wettable flank Pin Configuration Guide
Pin configuration for DP83TC813S-Q1 (28-pin vqfn (5.00 mm x 4.00 mm), wettable flank package). Pin numbering, functions, and connection diagrams are defined in the manufacturer datasheet. Refer to it for the exact footprint and soldering guidelines.
No detailed pinout data available for DP83TC813S-Q1.
Refer to the datasheet for full pin configuration.
Typical Applications
DP83TC813S-Q1 is suitable for 6 applications: Automotive Ethernet Gateway, ADAS Camera and Sensor Domains, Zonal Controller Architecture, Infotainment Head Units, Production-Line ECU Testing, Battery Management and Powertrain Nodes.
Automotive Ethernet Gateway
In a vehicle gateway ECU, the DP83TC813S-Q1 bridges 100BASE-T1 twisted-pair camera, sensor, and zonal links to the central Ethernet switch fabric over its SGMII interface. The PHY's Level IV emissions compliance with an integrated LPF reduces MDI-side filtering components, while the sub-20 uA TC-10 sleep current keeps the node within parked-vehicle battery-drain budgets. Configurable 3.3 V / 2.5 V / 1.8 V I/O rails let the PHY interface directly to the gateway SoC without level shifters. The PRBS generator with internal loopbacks supports end-of-line link verification without a live MAC, accelerating production test of gateway boards.
Recommended
ADAS Camera and Sensor Domains
ADAS camera and radar ECUs stream compressed video and object data over 100BASE-T1 links toward domain controllers. The DP83TC813S-Q1 fits these nodes because its SAE J2962-3 EMC compliance and Open Alliance emissions Level IV performance (with integrated LPF) help sensor clusters pass vehicle-level radiated emissions testing in densely packed housings. The wettable-flank 28-pin VQFN (5 x 4 mm) supports automated optical inspection required in high-reliability automotive assembly. Its TC-10 sleep current below 20 uA allows sensor nodes to be partially networked, waking only on demand during driving scenarios, reducing constant power draw.
Recommended
Zonal Controller Architecture
Zonal (body-domain) controllers aggregate legacy CAN/LIN traffic and forward it over 100BASE-T1 backbone links. The DP83TC813S-Q1's SGMII interface connects zonal MCUs or switch ASICs into the backbone while the single twisted-pair PHY reduces wiring harness weight versus multi-pair alternatives. TC-10 compliance with less than 20 uA sleep current is critical because zonal nodes remain connected in parked vehicles under strict quiescent budgets. The device's AEC-Q100 qualification and configurable I/O voltages (3.3 V, 2.5 V, 1.8 V) simplify reuse of the same PHY design across multiple zonal ECU variants with different host processors.
Recommended
Infotainment Head Units
Infotainment head units use 100BASE-T1 links to connect displays, camera harnesses, and amplifier modules across the cabin. The DP83TC813S-Q1 provides the SGMII-facing PHY port for the head-unit switch, with its integrated LPF and Level IV emissions performance reducing the risk of radio-receiver interference inside the EMI-noisy infotainment environment. The 28-pin VQFN wettable-flank package (5.00 mm x 4.00 mm) fits the high-density boards typical of HMI electronics. Its PRBS-based MAC-less test capability lets the production line verify every Ethernet port without booting the full infotainment software stack, improving test coverage and throughput.
Recommended
Production-Line ECU Testing
End-of-line test fixtures exploit the DP83TC813-Q1 family's pseudo-random binary sequence (PRBS) frame generation tool, which is fully compatible with internal loopbacks and can transmit and receive data without a MAC attached. Test engineers drive the PHY purely through register control to validate link training, BER performance, and MDI signal integrity on every assembled ECU. Because no external traffic source is required, fixture cost drops and test time shortens. The 25 MHz crystal requirement (-100 to +100 ppm, ESR up to 100 ohm) should be verified during fixture design, as reference-clock quality directly affects measured BER results in production screening.
Recommended
Battery Management and Powertrain Nodes
Battery management systems and powertrain controllers increasingly adopt automotive Ethernet for inter-module communication because of its noise immunity and harness savings. The DP83TC813S-Q1's AEC-Q100 qualification covers the harsh under-hood and near-battery environment, while TC-10 sleep support below 20 uA preserves pack-level quiescent-drain limits during shipping and storage. Configurable 3.3 V, 2.5 V, or 1.8 V I/O levels allow direct attachment to powertrain MCUs without level translators. The wettable-flank package meets the automated optical inspection standards applied to safety-relevant powertrain solder joints, supporting IPC-class automotive assembly flows.
Recommended
Recommended Products Summary
Engineering reference data for DP83TC813S-Q1 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DP83TC813R-Q1 | DP83TC811-Q1 |
|---|---|---|---|
| Brand | Texas Instruments | Texas Instruments | Texas Instruments |
| MAC Interface | SGMII | RGMII | RGMII |
| Network Speed | 100BASE-T1 (IEEE 802.3bw) | 100BASE-T1 (IEEE 802.3bw) | 100BASE-T1 (IEEE 802.3bw) |
| AEC-Q100 | Qualified | Qualified | Qualified |
Key Differentiators
- SGMII interface for switch-fabric connectivity (vs DP83TC813R-Q1)
- TC-10 sleep below 20 uA (vs DP83TC811-Q1)
- Integrated LPF achieving Level IV emissions (vs DP83TC813R-Q1)
Design Notes
The 25 MHz crystal directly governs transmit-clock accuracy. Per the datasheet timing table, the crystal must hold -100 to +100 ppm over temperature and aging with ESR not exceeding 100 ohm, and the reference duty cycle must stay within 35-65%. Use an automotive-grade AT-cut crystal rated for the full AEC-Q100 temperature range and verify load capacitance matching on the PCB; an out-of-spec reference is the most common root cause of 100BASE-T1 link-training failures in production.
Although the PHY integrates the MDI low-pass filter and passes Level IV emissions with it, board-level common-mode chokes on the twisted pair are still commonly used in automotive designs to meet system-level EMC. Keep the MDI pair length-matched and route it away from the SGMII differential pairs and switching-regulator nodes. Use the wettable flank of the 28-pin VQFN to enable AOI inspection of solder joints - do not place tall components blocking inspection access.
Do not interchange the S and R variants during second-source evaluation: the DP83TC813S-Q1 uses SGMII while the DP83TC813R-Q1 uses RGMII, and MAC-interface pin states differ despite the identical footprint. Also confirm the I/O rail selection (3.3 V, 2.5 V, or 1.8 V) against the host bank voltage at schematic time - strapping errors on the configurable I/O supply are a frequent bring-up failure. Consult the datasheet pin-state tables (power-up/reset and SGMII) during design review.
Compliance Information
AEC-Q100 qualification and SAE J2962-3 EMC compliance confirmed from TI product data. RoHS/REACH/lead-free certificates for DP83TC813SRHFRQ1 must be pulled from TI's official material declaration page.
