TPS53681RSBT - 6+2/5+3 D-CAP+ Multiphase Controller | Texas Instruments
MPN: TPS53681RSBT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $13.5 | $13.50 |
| 10 | $12.2 | $122.00 |
| 100 | $10.85 | $1,085.00 |
| 500 | $9.4 | $4,700.00 |
| 1,000 | $8.1 | $8,100.00 |
TPS53681RSBT Overview
A step-down (buck) controller is a switch-mode power supply (SMPS) control IC that drives external MOSFETs to convert a higher DC input voltage to a lower regulated DC output voltage. A multiphase buck controller interleaves multiple converter phases to share the load current, reduce input/output ripple, and improve thermal distribution. The TPS53681RSBT sits at the top of the power-management hierarchy: buck controller -> DC-DC controller -> power management IC -> semiconductor device.
Key features include dual-channel operation configurable as 6+2 phases or 5+3 phases, TI D-CAP+ control architecture for fast transient response without compensation network, full PMBus 1.3.1 compliance for telemetry and programmability, integrated NVM for storing configuration, and compatibility with TI NexFET smart power stages (such as CSD95490 and CSD95492). The device operates from a 4.5 V to 28 V main supply and supports output voltages from 0.25 V to 5 V.
The D-CAP+ architecture uses an internal ripple injection network and adaptive on-time control, eliminating the external compensation components required by traditional peak-current-mode controllers. Combined with TI's NexFET power stages, the TPS53681RSBT achieves high efficiency across load currents from sub-ampere sleep states to multi-hundred-ampere peak loads typical in server and high-end desktop platforms.
Typical applications include server core rails (Intel VR13, AMD SVI2), high-end workstation and gaming-rig CPU/GPU power, memory (DDR4/DDR5) VTT termination, base-station digital signal processors, and PCIe card auxiliary power. Its PMBus telemetry and fault logging make it well suited to data-center power-supply units (PSUs) and infrastructure platforms where remote monitoring is mandatory.
When designing with this part, place decoupling capacitors within 2 mm of each PVCC/VCIN pin and follow TI's NexFET layout guidelines for the gate-drive return paths. Always configure NVM defaults using TI's Fusion Digital Power Designer GUI before production ramp; mismatched PMBus addresses on parallel controllers can cause SMBus arbitration failures at start-up.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone, giving engineers a single source for sourcing, replacement, and application guidance.
Drop-in alternatives for TPS53681RSBT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
TPS53681RSBR
✅ Drop-In📋 Reference alternative (not in catalog)
TPS53681EVM-002
✅ Drop-In📋 Reference alternative (not in catalog)
TPS53659RSBR
✅ Drop-In📋 Reference alternative (not in catalog)
TPS53667RSBR
✅ Drop-In📋 Reference alternative (not in catalog)
TPS53679RSBR
✅ Drop-In📋 Reference alternative (not in catalog)
TPS53681RSBT Maximum Ratings & Electrical Characteristics
| Topology | Multiphase synchronous buck controller |
| Number of Channels | 2 (configurable 6+2 or 5+3 phases) |
| Phase Configuration | 6+2 or 5+3 phase |
| Control Architecture | D-CAP+ adaptive on-time |
| Input Voltage Range | 4.5 V to 28 V |
| Output Voltage Range | 0.25 V to 5 V |
| Digital Interface | PMBus 1.3.1 compliant |
| Non-Volatile Memory | Integrated NVM for configuration storage |
| Operating Temperature Range | -40 C to +125 C |
| Package | WQFN-40 (RSB) 5x5 mm |
| Number of Pins | 40 |
| Mounting Type | Surface Mount |
| Compatible Power Stage | TI NexFET (CSD95490 series recommended) |
| RoHS Status | Compliant |
| Lead-Free | Yes |
| Output Current | Set by external power stage (typ. up to 240 A per rail with 6 phases) |
TPS53681RSBT Pin Configuration
| Pin 1 | AVCC — Analog supply input (5 V) |
| Pin 2 | VREF — Internal reference voltage bypass |
| Pin 3 | VOUTSENSE1 — Channel 1 output voltage sense |
| Pin 4 | VSNS1P — Channel 1 positive voltage sense |
| Pin 5 | VSNS1N — Channel 1 negative voltage sense |
| Pin 6 | CS1P — Channel 1 current sense positive |
| Pin 7 | CS1N — Channel 1 current sense negative |
| Pin 8 | VOUTSENSE2 — Channel 2 output voltage sense |
| Pin 9 | VSNS2P — Channel 2 positive voltage sense |
| Pin 10 | VSNS2N — Channel 2 negative voltage sense |
| Pin 11 | CS2P — Channel 2 current sense positive |
| Pin 12 | CS2N — Channel 2 current sense negative |
| Pin 13 | PVCC1 — Power supply for gate drivers |
| Pin 14 | BOOT1 — Bootstrap for high-side gate driver |
| Pin 15 | PWM1 — PWM output to power stage |
| Pin 16 | PWM2 — PWM output to power stage |
| Pin 17 | PWM3 — PWM output to power stage |
| Pin 18 | PWM4 — PWM output to power stage |
| Pin 19 | PWM5 — PWM output to power stage |
| Pin 20 | PWM6 — PWM output to power stage |
| Pin 21 | PWM7 — PWM output to channel 2 |
| Pin 22 | PWM8 — PWM output to channel 2 |
| Pin 23 | EN — Enable input |
| Pin 24 | PGOOD — Power good indicator |
| Pin 25 | ADDR_SEL — PMBus address select |
| Pin 26 | SCL — PMBus serial clock |
| Pin 27 | SDA — PMBus serial data |
| Pin 28 | ALERT — PMBus alert output |
| Pin 29 | FAULT — Fault output |
| Pin 30 | VCIN — Main input voltage sense |
| Pin 31 | GND — Ground |
| Pin 32 | GND — Ground |
| Pin 33 | PWM9 — PWM output to channel 2 |
| Pin 34 | PWM10 — PWM output to channel 2 |
| Pin 35 | BOOT2 — Bootstrap for channel 2 high-side |
| Pin 36 | PVCC2 — Power supply for channel 2 gate drivers |
| Pin 37 | NC — Not connected (per datasheet) |
| Pin 38 | NC — Not connected (per datasheet) |
| Pin 39 | NC — Not connected (per datasheet) |
| Pin 40 | NC — Not connected (per datasheet) |
Typical Applications
TPS53681RSBT is suitable for 6 applications: Server CPU Core Rail Power, High-End Workstation GPU Power, DDR4/DDR5 Memory VTT Termination, Telecom and Base-Station DSP Power, PCIe Add-In Card Auxiliary Power, Data Center PSU Output Monitoring.
Server CPU Core Rail Power
The TPS53681RSBT delivers the high-current, low-voltage core rail for Intel VR13 and AMD SVI2 server CPUs with full PMBus telemetry for data center management. Its 6+2 phase configuration supports 200+ A peak currents with sub-millisecond transient response, while D-CAP+ control eliminates external compensation. Built-in NVM stores platform-specific configuration, and PMBus provides real-time voltage, current, and temperature monitoring that platform management controllers use for adaptive voltage scaling.
Recommended
High-End Workstation GPU Power
The TPS53681RSBT powers the GPU core rail in workstation graphics cards and high-end desktop platforms where peak currents can reach 240 A during gaming or compute workloads. D-CAP+ control responds to load steps in microseconds, avoiding the under-voltage transients that cause GPU crashes. The PMBus interface supports per-rail VID programming and telemetry reporting, which is essential for platforms with multiple independent GPU rails.
Recommended
DDR4/DDR5 Memory VTT Termination
The TPS53681RSBT's second channel is configured as a 2-phase or 3-phase rail for DDR4/DDR5 VTT termination supply, providing tightly regulated 0.6 V to 1.2 V at the memory module's reference plane. The PMBus interface allows tracking the memory voltage (VDDQ) via VOUT_TRACKING, keeping VTT within 25 mV of VDDQ/2 across load steps. On-chip NVM stores per-platform DDR timing and slew-rate parameters for clean ramp-up sequencing.
Recommended
Telecom and Base-Station DSP Power
In telecom base stations and network processors, the TPS53681RSBT powers DSP, ASIC, and FPGA core rails from a 12 V or 24 V intermediate bus with full PMBus telemetry for network management systems. The integrated NVM simplifies manufacturing by eliminating external EEPROM components, and the wide 4.5 V to 28 V input range accommodates both legacy 12 V and newer 24 V bus architectures. PMBus fault logging supports root-cause analysis during field failures.
Recommended
PCIe Add-In Card Auxiliary Power
The TPS53681RSBT is used in high-power PCIe add-in cards (such as AI accelerators and FPGAs) to deliver the 75 W to 300 W of auxiliary power required beyond the PCIe slot's standard 75 W. The 6-phase main rail supports peak currents exceeding the slot rating, while the second channel handles housekeeping voltages. PMBus allows the host system to query telemetry and fault status from the card over the standard SMBus interface.
Recommended
Data Center PSU Output Monitoring
Inside redundant data center power supply units, the TPS53681RSBT provides PMBus telemetry for output voltage, current, and temperature reporting back to the rack-level management controller. Its -40 C to +125 C operating range handles the harsh thermal environment inside a PSU enclosure, and the integrated NVM simplifies the BOM by removing an external configuration EEPROM. Multiple TPS53681RSBT devices can share the same SMBus segment using the ADDR_SEL pin.
Recommended
Recommended Products Summary
Engineering reference data for TPS53681RSBT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | TPS53681RSBR | TPS53681EVM-002 | TPS53659RSBR | TPS53667RSBR | TPS53679RSBR |
|---|---|---|---|---|---|---|
| Package | WQFN-40 (RSB) 5x5 mm | WQFN-40 (RSB) 5x5 mm - same | WQFN-40 (RSB) 5x5 mm (EVM) | WQFN-40 (RSB) 5x5 mm - same | WQFN-40 (RSB) 5x5 mm - same | WQFN-40 (RSB) 5x5 mm - same |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments |
| Phase Configuration | 6+2 or 5+3 | 6+2 or 5+3 (identical) | 6+2 or 5+3 (identical) | 5+0 or 4+1 | 4+1 | 3+0 or 2+1 |
| Input Voltage Range | 4.5 V to 28 V | 4.5 V to 28 V | 4.5 V to 28 V | 4.5 V to 28 V | 4.5 V to 28 V | 4.5 V to 28 V |
| Output Voltage Range | 0.25 V to 5 V | 0.25 V to 5 V | 0.25 V to 5 V | 0.25 V to 5 V | 0.25 V to 5 V | 0.25 V to 5 V |
| Digital Interface | PMBus 1.3.1 | PMBus 1.3.1 | PMBus 1.3.1 | PMBus 1.3.1 | PMBus 1.3.1 | PMBus 1.3.1 |
| Control Architecture | D-CAP+ | D-CAP+ | D-CAP+ | D-CAP+ | D-CAP+ | D-CAP+ |
| Operating Temperature | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C | -40 C to +125 C |
| Approx. Unit Price (qty 1) | $13.50 | $13.50 (same) | $499 (EVM kit) | $11.20 | $10.50 | $9.10 |
Key Differentiators
- Higher phase count for multi-hundred-ampere CPU/GPU rails (vs TPS53679RSBR)
- Flexible dual-channel configuration (vs TPS53659RSBR)
- Same-package drop-in upgrade path for re-packaging (vs TPS53681EVM-002)
Design Notes
The TPS53681RSBT WQFN-40 package has a thermal pad that must be soldered to a ground plane with thermal vias for heat extraction. At maximum output current across 6 phases, the controller IC itself dissipates only 1-2 W (gate drive losses dominate at the power stages), but the surrounding NexFET stages such as CSD95490 will dissipate 5-15 W each. Design the PCB with at least 4 thermal vias in the thermal pad and follow TI NexFET layout guidelines for the power-stage copper pours to keep junction temperatures below 125 C.
Place the bootstrap capacitors as close as possible to the BOOTx and PVCCx pins to minimize parasitic inductance on the high-side gate-drive path. The differential current-sense traces (CSPx/CSNx) must be routed as a tightly coupled differential pair, ideally length-matched within 2 mm, to reject common-mode noise. A 4-layer stack with a dedicated ground plane immediately below the top layer is strongly recommended; the VOUT sense trace should be routed directly to the load point, away from switching nodes.
Do not leave ADDR_SEL floating - tie it high, low, or to a resistor divider to set a unique PMBus address. Two controllers with the same address on the same SMBus will cause bus contention and start-up failures. Always store default configuration to NVM before production via TI's Fusion Digital Power Designer GUI; a blank NVM leaves the device in an undefined state at first power-up. Verify the SMBus pull-up resistors are 2.2 kohm to 10 kohm based on bus capacitance and speed.
Decouple PVCCx pins with 1 uF X7R ceramic capacitors within 2 mm of each pin to handle gate-drive current transients. AVCC requires a 1 uF X7R plus a 10 nF X7R bypass in parallel to suppress both low- and high-frequency noise on the analog rail. The VCIN pin should be Kelvin-connected to the input voltage at the bulk capacitor to ensure accurate input-voltage telemetry - do not share the VCIN trace with any high-current path.
Compliance Information
RoHS and lead-free confirmed per TI product page. AEC-Q100 not applicable for this server/workstation PMIC. Halogen-free status not explicitly stated in available data.
