DSPIC33CK128MC105-E/PT - 16-bit 100MHz DSC 128KB Flash | Microchip
MPN: DSPIC33CK128MC105-E/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $5.2 | $5.20 |
| 10 | $4.68 | $46.80 |
| 100 | $4.16 | $416.00 |
| 500 | $3.74 | $1,870.00 |
| 1,000 | $3.38 | $3,380.00 |
DSPIC33CK128MC105-E/PT Overview
A Digital Signal Controller combines the compute architecture of a microcontroller with DSP-class math capability in a single chip. In the power-management hierarchy, the dsPIC33CK sits between general-purpose MCUs and dedicated DSP ICs: it executes real-time control loops (such as field-oriented motor control or digital power conversion) at speeds that a standard MCU cannot sustain, while retaining the peripherals, interrupt structure, and low cost of an embedded controller. The dsPIC33CK series is Microchip's single-core generation of this category, succeeding the dsPIC33EP family.
Key differentiating features of the DSPIC33CK128MC105 include its 100 MIPS-class dsPIC33CK core with DSP instruction extensions, on-chip op-amps that reduce external component count in current-sense circuits, a 12-bit ADC supporting high-speed sampling of control-loop variables, and a high-speed PWM module purpose-built for power conversion topologies. The '-E' suffix denotes an extended temperature grade, and the FuSa qualification support targets safety-oriented designs per IEC functional-safety development flows.
Architecturally, the device pairs a 16-bit pipelined CPU with single-cycle MAC and DSP instructions, deterministic interrupt latency for tight control-loop timing, and Flash self-programming for field updates. Memory of 128 KB Flash and 16 KB RAM accommodates complex control algorithms, fieldbus stacks, and diagnostics code simultaneously.
Typical applications include brushless DC and PMSM motor drives for industrial automation, digital power supplies (LLC, totem-pole PFC, LLC resonant converters), EV charging and battery-management control boards, and high-performance general embedded control where deterministic real-time behavior is required.
Design consideration: operate the device within the specified 3 V to 3.6 V rail and decouple all VDD/VSS pairs with 100 nF ceramics placed directly at the package pins; the 48-TQFP 0.5 mm pitch also demands careful stencil design to avoid solder bridging.
This page synthesizes distributor pricing and availability data, drop-in same-family alternatives, pinout guidance, and practical design notes not consolidated in the manufacturer datasheet, as of 2026-09-22.
Drop-in alternatives for DSPIC33CK128MC105-E/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33CK128MC105-E/PT (same form factor and footprint) — differing in Core, Package, PWM, ADC Resolution, Operating Temperature.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33CK128MC105-H/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33CK256MC105-E/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33CK64MC105-E/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33CK32MC105-E/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$1.55 / Unit
View Datasheet →DSPIC33CK128MC105-E/PT Maximum Ratings & Electrical Characteristics
| Core | dsPIC33CK 16-bit DSC core |
| CPU Speed | 100 MHz |
| Program Memory (Flash) | 128 KB (128K x 8) |
| RAM (Data Memory) | 16 KB |
| Supply Voltage Range | 3 V to 3.6 V |
| I/O Count | 39 I/O |
| ADC Resolution | 12-bit |
| Integrated Op-Amps | Yes |
| PWM | High-speed PWM |
| Package | 48-TQFP (7x7 mm), 0.5 mm pitch |
| Mounting Type | Surface Mount |
| Operating Temperature | -40C to +125C (E grade) |
| Family Attribute | Functional Safety (FuSa) family |
DSPIC33CK128MC105-E/PT 48-tqfp (7x7 mm), 0.5 mm pitch Pin Configuration Guide
Pin configuration for DSPIC33CK128MC105-E/PT (48-tqfp (7x7 mm), 0.5 mm pitch package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for DSPIC33CK128MC105-E/PT.
Refer to the datasheet for full pin configuration.
Typical Applications
DSPIC33CK128MC105-E/PT is suitable for 6 applications: BLDC/PMSM Motor Control, Digital Power Conversion, EV Charging and Battery Management, Industrial Automation and Robotics, High-Performance General Embedded Control, IoT and Smart Sensor Nodes.
BLDC/PMSM Motor Control
The DSPIC33CK128MC105-E/PT fits brushless DC and PMSM motor drives because its 100 MHz 16-bit DSP core executes field-oriented control (FOC) loops at cycle rates well above the electrical frequency of typical motors, with single-cycle MAC instructions handling the Park/Clarke transforms. The 12-bit ADC samples phase currents synchronously with the high-speed PWM, and the integrated op-amps condition shunt or in-line current-sense signals without external amplifier ICs. Deterministic interrupt latency keeps the current loop jitter-free, which directly reduces torque ripple and acoustic noise. Microchip's dsPIC33CK Low-Voltage Motor Control Board (DS50002927a) provides a proven reference design path from schematic to firmware.
Recommended
Digital Power Conversion
For digital power supplies - LLC resonant converters, totem-pole PFC, and high-frequency buck stages - the DSPIC33CK128MC105-E/PT offers a high-resolution high-speed PWM module purpose-built for phase management, dead-time control, and frequency modulation. The 100 MHz core closes voltage and current loops with cycle-by-cycle current limiting in firmware, while the 12-bit ADC converts sensed feedback synchronously to the switching period, minimizing control delay. Operating from a 3.3 V rail it interfaces cleanly with standard gate-driver and controller logic. The 128 KB Flash accommodates compensation networks, fault-management state machines, and PMBus-style command handling in a single image.
Recommended
EV Charging and Battery Management
In EV charging infrastructure and battery-management boards, the DSPIC33CK128MC105-E/PT handles real-time control of power stages while the FuSa-oriented dsPIC33CK platform supports functional-safety development flows required by charging-equipment standards. The 12-bit ADC plus on-chip op-amps measure battery current and cell-voltage signals with minimal external front-end circuitry, and the high-speed PWM drives the DC/DC conversion stage. Extended -40C to +125C operation of the '-E' grade suits outdoor and under-chassis environments. Select the DSPIC33CK128MC105-H/PT variant (-40C to +150C, AEC-Q100) where automotive qualification is contractually required.
Recommended
Industrial Automation and Robotics
Industrial drives, servo stages, and robotic joint controllers benefit from the DSPIC33CK128MC105-E/PT's combination of DSP-class control throughput and microcontroller-style integration. One chip closes the servo current/velocity/position cascades at 100 MHz while simultaneously running CAN or UART communication stacks from the 128 KB Flash and 16 KB RAM. The 39 I/O and rich peripheral set interface encoders, limit switches, and safety interlocks directly. Deterministic execution simplifies certification-relevant timing analysis, and the wide industrial temperature range plus surface-mount 48-TQFP (7x7 mm) package fits compact drive electronics mounted on or near the motor.
Recommended
High-Performance General Embedded Control
For general high-performance embedded systems - test fixtures, instrumentation front ends, and compute-intensive sensor fusion nodes - the DSPIC33CK128MC105-E/PT provides 100 MIPS-class signal processing with familiar MCU peripherals. DSP instructions accelerate FFT filtering and math on sampled data, the 12-bit ADC handles moderate-rate acquisition, and 16 KB RAM buffers datasets or communication frames. Compared with a pure MCU, control and math workloads complete sooner at lower clock-per-task cost; compared with a discrete DSP, peripheral integration and cost are superior. The active lifecycle status and broad distribution availability (DigiKey, Mouser, LCSC) support long-term production designs.
Recommended
IoT and Smart Sensor Nodes
The DSPIC33CK128MC105-E/PT serves demanding IoT edge nodes that perform local signal processing - vibration analyzers, power-quality meters, and smart motor sensors - where a plain MCU lacks the math throughput. The 100 MHz core runs FIR/IIR filtering and feature extraction locally, transmitting only condensed results over UART/SPI/I2C links to a wireless module. The 3 V to 3.6 V supply range matches standard 3.3 V rail architectures, and the 48-TQFP (7x7 mm) footprint keeps node PCBs compact. The integrated op-amps amplify piezo or shunt signals directly, trimming BOM cost versus external amplification stages.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33CK128MC105-E/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33CK128MC105-H/PT | DSPIC33CK256MC105-E/PT | DSPIC33CK64MC105-E/PT | DSPIC33CK32MC105-E/PT |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 48-TQFP (7x7 mm) | 48-TQFP (7x7 mm) - same | 48-TQFP (7x7 mm) - same | 48-TQFP (7x7 mm) - same | 48-TQFP (7x7 mm) - same |
| CPU Speed | 100 MHz | 100 MHz | 100 MHz | 100 MHz | 100 MHz |
| Program Memory (Flash) | 128 KB | 128 KB | 256 KB | 64 KB | 32 KB |
| RAM | 16 KB | 16 KB | 16 KB | 16 KB | 16 KB |
| Operating Temperature | -40C to +125C (E grade) | -40C to +150C (AEC-Q100) | -40C to +125C | -40C to +125C | -40C to +125C |
| Supply Voltage | 3 V to 3.6 V | 3 V to 3.6 V | 3 V to 3.6 V | 3 V to 3.6 V | 3 V to 3.6 V |
| ADC / Op-Amps | 12-bit ADC, integrated op-amps | 12-bit ADC, integrated op-amps | 12-bit ADC, integrated op-amps | 12-bit ADC, integrated op-amps | 12-bit ADC, integrated op-amps |
Key Differentiators
- Extended temperature and FuSa orientation at standard price (vs DSPIC33CK128MC105-H/PT)
- Balanced 128 KB Flash for mainstream control firmware (vs DSPIC33CK256MC105-E/PT)
- Full RAM for buffered control algorithms (vs DSPIC33CK32MC105-E/PT)
Design Notes
The 48-TQFP (7x7 mm) package uses a 0.5 mm lead pitch, which requires a precise solder-paste stencil (typically 100-120 um thick with 4-5 mil apertures) to avoid bridging. Place one 100 nF X7R ceramic decoupling capacitor at every VDD pin, as close to the pin as possible, plus a bulk 10 uF ceramic near the device. Ground all VSS pins to a solid ground plane; do not share a single thermal-relief via chain among VSS pins on a high-PWM-noise board.
Operate the DSC strictly within the 3 V to 3.6 V window specified for the dsPIC33CK family; a nominal 3.3 V LDO or buck output with +/-2% tolerance is recommended. If 5 V signals exist in the system, level-shift them - dsPIC33CK I/O is not 5 V tolerant per the family specification practice. When the device drives high-speed PWM into gate drivers, add local bulk capacitance to absorb the switching-current transients and prevent rail droop that could trigger brown-out resets mid control cycle.
Migrating from older dsPIC33E designs, note that the dsPIC33CK generation requires the MPLAB XC-DSC compiler rather than the older XC16 licensing path for full optimization, and configuration-word registers differ - code will not port by recompile alone. When substituting Flash-density variants (32/64/128/256 KB) on the same PCB, verify the linker memory map and that firmware fits the smallest variant before consolidating SKUs. For the automotive H/PT variant, confirm reflow and MSL handling per Microchip packing specs before mixed-use on industrial lines.
Compliance Information
Verified data does not state RoHS/REACH status for the E/PT grade. The -H/PT variant is explicitly AEC-Q100 qualified per Microchip USA listing; the E/PT grade belongs to the FuSa-oriented dsPIC33CK family but no AEC-Q100 qualification is stated for it.
