DSPIC33CK32MC105-E/M4 - 100MHz DSC, 32KB Flash 48-UQFN | Microchip
MPN: DSPIC33CK32MC105-E/M4 β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $4.95 | $4.95 |
| 10 | $4.45 | $44.50 |
| 100 | $3.95 | $395.00 |
| 500 | $3.55 | $1,775.00 |
| 1,000 | $3.2 | $3,200.00 |
DSPIC33CK32MC105-E/M4 Overview
A Digital Signal Controller combines the computational throughput of a Digital Signal Processor with the peripheral integration and deterministic interrupt architecture of a microcontroller, sitting in the component hierarchy between a generic MCU and a dedicated DSP. The dsPIC33CK family extends this concept with a modified Harvard, 16-bit pipelined core optimized for single-cycle MAC and DSP instructions, making it a power-management-class controller for digitally controlled power conversion and precision motion.
Key features include an operating voltage window of 3.0 V to 3.6 V, an on-chip 12-bit high-speed ADC, three integrated operational amplifiers, a comparator, and a high-resolution PWM module purpose-built for power conversion topologies. The -E temperature suffix qualifies the device for -40C to +125C ambient operation, and the family carries Functional Safety (FuSa) support documentation.
Technically, the dsPIC33CK core executes most instructions in a single cycle with DSP-enhanced multiply-accumulate, and the ADC and PWM modules can be tightly coupled for fast control loops with sub-microsecond update rates. Program Flash includes ECC and fault-injection test support, while SRAM includes Memory Built-In Self-Test (MBIST), features that support safety-oriented designs.
Typical applications include digital power supplies (LLC, totem-pole PFC), brushless DC and PMSM motor control, and advanced sensing front ends, where the integrated op amps condition current-shunt signals before the high-speed ADC without external amplifiers.
Design consideration: the 3.0 V to 3.6 V supply window is narrow, so use a precision LDO or buck regulator with adequate accuracy, and decouple the VDD pins with low-ESR ceramics placed directly at the UQFN power pins.
This page synthesizes distributor pricing, drop-in family alternatives, and practical design notes not found in the manufacturer datasheet. Pricing reflects distributor data as of 2026-09-23.
Drop-in alternatives for DSPIC33CK32MC105-E/M4 β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33CK32MC105-E/M4 (same form factor and footprint) β differing in Core, Operating Temperature, PWM, Architecture, Data SRAM.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
DSPIC33CK32MC105-I/M4
β Drop-Inβ In Stock
$2.19 / Unit
View Datasheet βDSPIC33CK64MC105-E/M4
β Drop-In β οΈ εζ°εΎ ιͺθ―β In Stock
$0.8 / Unit
View Datasheet βDSPIC33CK32MC106-E/M4
β Drop-In β οΈ εζ°εΎ ιͺθ―π Reference alternative (not in catalog)
DSPIC33CK64MC106-E/M4
β Drop-In β οΈ εζ°εΎ ιͺθ―π Reference alternative (not in catalog)
DSPIC33CK32MC102-E/M4
β Drop-In β οΈ εζ°εΎ ιͺθ―π Reference alternative (not in catalog)
DSPIC33CK32MC105-E/M4 Maximum Ratings & Electrical Characteristics
| Core | dsPIC33CK 16-bit DSC core |
| Maximum CPU Speed | 100 MHz (100 MIPS) |
| Program Flash | 32 KB (with ECC) |
| Data SRAM | 8 KB (with MBIST) |
| Operating Voltage | 3.0 V to 3.6 V |
| Operating Temperature | -40C to +125C (E grade) |
| Package | 48-UQFN (6x6 mm) |
| ADC Resolution | 12-bit |
| ADC Type | High-Speed ADC |
| Op Amps | 3 integrated operational amplifiers |
| Comparators | 1 comparator |
| PWM | High-resolution PWM |
| Peripheral Trigger Generator | Yes (PTG) |
| Functional Safety Support | Yes (FuSa) |
| Qualification | AEC-Q100 qualified |
| Mounting Type | Surface Mount |
| Packaging | Tube |
DSPIC33CK32MC105-E/M4 48-uqfn (6x6 mm) Pin Configuration Guide
Pin configuration for DSPIC33CK32MC105-E/M4 (48-uqfn (6x6 mm) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for DSPIC33CK32MC105-E/M4.
Refer to the datasheet for full pin configuration.
Typical Applications
DSPIC33CK32MC105-E/M4 is suitable for 6 applications: Digital Power Supplies (LLC, Totem-Pole PFC), Brushless DC and PMSM Motor Control, Advanced Sensing and Touch Interfaces, Automotive Motor and Actuator Control, Wireless Charging and Wireless Power Transfer, LED Drivers and Lighting Power.
Digital Power Supplies (LLC, Totem-Pole PFC)
The DSPIC33CK32MC105-E/M4 fits digital power conversion because its high-resolution PWM delivers the fine duty and phase resolution that LLC and totem-pole PFC topologies need for tight output regulation, while the 12-bit high-speed ADC samples input and output voltages and currents with sub-microsecond latency at the 100 MHz, 100 MIPS core speed. The three integrated op amps buffer current-shunt signals before the ADC, removing external amplifiers and their offset and BOM cost. Typical usage places the DSC in the voltage-mode outer loop and the fast current-mode inner loop, with the ADC triggered directly by the PWM module for jitter-free sampling. The trade-off versus fixed-function controllers is firmware effort, offset by full flexibility to change topologies in software. The 32 KB Flash accommodates a complete compensator and housekeeping stack.
Recommended
Brushless DC and PMSM Motor Control
For BLDC and PMSM drives, the DSPIC33CK32MC105-E/M4 aligns with every stage of the control chain: the high-resolution PWM generates six complementary gate commands with dead-time control, the three on-chip op amps amplify low-side shunt phase currents, and the 12-bit high-speed ADC converts them fast enough for field-oriented control loops executed at 100 MIPS. According to Microchip, the dsPIC33CK family specifically targets motor control with enhanced on-chip peripherals. In a typical design the DSC closes the FOC current loop in the tens-of-kilohertz range, well within the core budget, and the one comparator provides fast overcurrent trip without CPU intervention. The 32 KB Flash holds a full FOC stack plus UART/CAN housekeeping; choose the 64 KB MC106 variant if sensorless observers push code size past 32 KB.
Recommended
Advanced Sensing and Touch Interfaces
The DSPIC33CK32MC105-E/M4 serves advanced sensing nodes because its 12-bit high-speed ADC, three op amps, and DSP-enhanced MAC instructions support real-time filtering and correction math on-chip at 100 MIPS. Signal-conditioning gain stages are implemented with the integrated op amps, so a resistive or current-loop sensor can connect with minimal external circuitry; the ADC's high sample rate allows oversampling to increase effective resolution beyond 12 bits. Microchip positions the dsPIC33CK family explicitly for 'advanced sensing and control, touch' applications, and the peripheral trigger generator (PTG) automates sensor sampling sequences with minimal CPU intervention. The -E temperature grade sustains -40C to +125C operation for industrial sensing in enclosures with limited airflow, and the 48-UQFN 6x6 mm footprint fits compact sensor boards.
Recommended
Automotive Motor and Actuator Control
The DSPIC33CK32MC105-E/M4 is AEC-Q100 qualified and carries the -40C to +125C E-grade rating, which together satisfy the environmental requirements of automotive actuator modules such as pumps, fans, throttle bodies, and HVAC dampers. Distributor listings (DigiKey, Avnet) explicitly categorize it as 'dsPIC Automotive, AEC-Q100'. The integrated op amps and high-speed ADC let one DSC close both the motor current loop and position feedback loop, while the high-resolution PWM drives the inverter with low quantization-induced torque ripple. Functional Safety (FuSa) support, ECC program Flash, and SRAM MBIST provide the diagnostic infrastructure demanded by safety-relevant actuator firmware. At 3.3 V single supply with a narrow 3.0 V to 3.6 V window, use a precision automotive regulator for the VDD rail.
Recommended
Wireless Charging and Wireless Power Transfer
Wireless power transmitters and receivers need precisely phase-controlled full-bridge drive plus fast fault response, and the DSPIC33CK32MC105-E/M4 provides both: the high-resolution PWM generates interleaved or phase-shifted bridge commands with fine resolution, and the on-chip comparator trips in hardware for foreign-object or overcurrent events without waiting for CPU latency. Running at 100 MHz (100 MIPS), the core executes frequency-tracking and power-control algorithms for resonant WPT links in real time, while the 12-bit ADC monitors coil current via the integrated op amps. The 3.0 V to 3.6 V supply suits designs where a 3.3 V rail already exists from a housekeeping buck converter. The 32 KB Flash holds demodulation and Qi-style protocol code for compact transmitter boards using the 6x6 mm UQFN footprint.
Recommended
LED Drivers and Lighting Power
Digitally controlled LED drivers benefit from the DSPIC33CK32MC105-E/M4's high-resolution PWM, which produces the fine duty resolution needed for flicker-free constant-current regulation and smooth dimming, including high-ratio dimming where coarse PWM quantization otherwise causes visible steps. The 12-bit high-speed ADC, buffered by the three on-chip op amps, senses LED current through a shunt for closed-loop current control at 100 MIPS, and the hardware comparator provides fast short-circuit protection. Automotive exterior lighting modules can use the AEC-Q100-qualified -E part across -40C to +125C. At a 3.3 V digital supply with a 3.0 V to 3.6 V window, gate-drive level shifting to the power stage follows standard Microchip switch-mode lighting reference designs. The 32 KB Flash easily accommodates a complete buck or boost lighting controller.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33CK32MC105-E/M4 β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33CK32MC105-I/M4 | DSPIC33CK64MC105-E/M4 | DSPIC33CK32MC106-E/M4 | DSPIC33CK64MC106-E/M4 | DSPIC33CK32MC102-E/M4 |
|---|---|---|---|---|---|---|
| Package | 48-UQFN (6x6 mm) | 48-UQFN (6x6 mm) - same | 48-UQFN (6x6 mm) - same | 48-UQFN (6x6 mm) - same | 48-UQFN (6x6 mm) - same | 48-UQFN (6x6 mm) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Program Flash | 32 KB (ECC) | 32 KB (ECC) | 64 KB (ECC) | 64 KB (ECC) | 64 KB (ECC) | 16 KB (ECC) |
| Data SRAM | 8 KB (MBIST) | 8 KB (MBIST) | 8 KB (MBIST) | 8 KB (MBIST) | 8 KB (MBIST) | 8 KB (MBIST) |
| CPU Speed | 100 MHz (100 MIPS) | 100 MHz (100 MIPS) | 100 MHz (100 MIPS) | 100 MHz (100 MIPS) | 100 MHz (100 MIPS) | 100 MHz (100 MIPS) |
| Operating Temperature | -40C to +125C | -40C to +85C (I grade) | -40C to +125C | -40C to +125C | -40C to +125C | -40C to +125C |
| ADC / Op Amps | 12-bit high-speed ADC, 3 op amps, 1 comparator | 12-bit ADC, 3 op amps | 12-bit ADC, 3 op amps | 12-bit ADC, 3 op amps | 12-bit ADC, 3 op amps | 12-bit ADC, 3 op amps |
| Qualification | AEC-Q100, FuSa | Industrial grade | AEC-Q100, FuSa | AEC-Q100, FuSa | AEC-Q100, FuSa | AEC-Q100, FuSa |
Key Differentiators
- Extended temperature grade for automotive zones (vs DSPIC33CK32MC105-I/M4)
- Lowest-cost entry point with full peripheral set (vs DSPIC33CK64MC105-E/M4)
- More headroom than minimal-memory siblings (vs DSPIC33CK32MC102-E/M4)
Design Notes
The DSPIC33CK32MC105-E/M4 operates only from 3.0 V to 3.6 V, so power the VDD pins from a tightly regulated 3.3 V rail. Place one 0.1 uF ceramic capacitor at each VDD/VSS pin pair plus a 4.7 uF to 10 uF bulk capacitor near the package; keep the loop area small on the 48-UQFN 6x6 mm footprint. The narrow window leaves little margin for rail droop during PWM gate-charge events, so verify supply ripple under full PWM load with an oscilloscope at the package pins, not just at the regulator output.
The op-amp inputs and 12-bit high-speed ADC channels are multiplexed with digital port pins on the UQFN package. Route shunt-sense traces as short Kelvin connections directly from the resistor pads, and keep PWM and gate-drive traces away from analog routing to prevent switching noise coupling into the ADC. When sampling at maximum ADC rate, synchronize sampling to the PWM period (ADC trigger from the PWM module) so current samples are taken at consistent points in the switching cycle, which minimizes ripple aliasing in FOC loops.
For extended -E grade operation near +125C ambient, use the exposed thermal pad on the underside of the 48-UQFN package, soldered to a grounded copper pour with thermal vias. Estimated: a typical dsPIC33CK at 100 MHz dissipates on the order of 100 to 200 mW; with an approximate theta_JA near 40 C/W on a good pour, junction rise is roughly 4 to 8 C above ambient - modest, but verify with your own layout and switching-adjacent heat sources. Always derate maximum clock at high ambient per Microchip's operating-condition curves.
Do not omit the MCLR pull-up and programming-header access (PGD/PGC pins); the 48-UQFN package makes rework difficult, so in-circuit programming access must be designed in from the start. Configure unused I/O as outputs driving low or inputs with pull-ups per Microchip guidelines to avoid floating-pin current in EMI-sensitive designs. Also note the pin-compatible 32 KB and 64 KB variants require matching linker/device selection in MPLAB X - code compiled for the DSPIC33CK64MC105 will not run correctly on this 32 KB part if it exceeds Flash.
Compliance Information
AEC-Q100 qualified per DigiKey/Mouser distributor listings; RoHS compliant per standard Microchip product status. REACH and halogen-free status not stated in the provided data.
