DSPIC33EP128GM310-H/PT - 70 MIPS 16-bit DSC 128KB TQFP-100 | Microchip
MPN: DSPIC33EP128GM310-H/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $6.2 | $6.20 |
| 10 | $5.6 | $56.00 |
| 100 | $4.95 | $495.00 |
| 500 | $4.4 | $2,200.00 |
| 1,000 | $3.9 | $3,900.00 |
DSPIC33EP128GM310-H/PT Overview
A digital signal controller combines the compute architecture of a microcontroller with the mathematical throughput of a digital signal processor. Within the power-management hierarchy of embedded systems, a DSC sits between general-purpose MCUs and dedicated DSPs: it executes control-loop code and DSP-style MAC (multiply-accumulate) instructions on a single 16-bit Harvard architecture core, which is why DSCs dominate digital motor control and power conversion designs.
Key features include the 70 MIPS dsPIC DSC core with integrated DSP engine, single-cycle MAC and dual fetch; enhanced on-chip peripherals including analog comparators and operational amplifiers for motor feedback conditioning; flexible Peripheral Pin Select (PPS) for remapping digital I/O; and multiple PGECx/PGEDx pin pairs supporting in-circuit serial programming (ICSP) via MPLAB tools such as SNAP, ICD and REAL ICE.
The dsPIC33EP128GM3xx architecture provides a broad peripheral set aimed at control systems: PWM modules suited to three-phase inverter drives, high-speed ADCs for current sensing, UART/SPI/I2C communication, and a DMA controller that offloads data movement from the CPU. The 128 KB Flash supports compiled control algorithms plus bootloader headroom, and 3.3V operation aligns with modern logic rails.
Typical applications are precision motor control (BLDC, PMSM, stepper drives), digital power supplies and solar inverters, industrial automation nodes, and sensor signal processing where DSP instructions accelerate filtering.
Design consideration: connect every VDD/VSS pair per the datasheet, and pair ICSPCLK/ICSPDAT from the same PGECx/PGEDx pair when wiring the programming header.
This page synthesizes distributor pricing context, drop-in family alternatives, and practical design notes not consolidated in the manufacturer datasheet alone.
Drop-in alternatives for DSPIC33EP128GM310-H/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33EP128GM310-H/PT (same form factor and footprint) — differing in Package, Supply Voltage, Core Architecture, Core Processor, Operating Temperature.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33EP128GM310-E/PT
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33EP256GM310-I/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$4.18 / Unit
View Datasheet →DSPIC33EP64GM310-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP128GM710-I/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$5.55 / Unit
View Datasheet →DSPIC33EP128GM610-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP128GM310-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP256GM310-H/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$4.75 / Unit
View Datasheet →DSPIC33EP128GM310-H/PT Maximum Ratings & Electrical Characteristics
| Core Architecture | 16-bit dsPIC33E Harvard, integrated DSP engine |
| Maximum CPU Speed | 70 MIPS |
| Program Memory (Flash) | 128 KB (43K x 24) |
| Supply Voltage | 3.3 V |
| Package | 100-TQFP (12x12 mm) |
| Mounting Type | Surface Mount |
| Qualification | Automotive, AEC-Q100 |
| Temperature Grade Suffix | -H (extended temperature) |
| Packaging | Tray |
| Series | dsPIC33EP128GM310 |
| Peripheral Pin Select (PPS) | Yes |
| Analog Comparators / Op Amps | Yes (on-chip op amps) |
| ICSP Debug/Programming | Yes, multiple PGECx/PGEDx pairs |
| Programming Tools | MPLAB SNAP, ICD 3/4, REAL ICE, PICkit |
DSPIC33EP128GM310-H/PT 100-tqfp (12x12 mm) Pin Configuration Guide
Pin configuration for DSPIC33EP128GM310-H/PT (100-tqfp (12x12 mm) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for DSPIC33EP128GM310-H/PT.
Refer to the datasheet for full pin configuration.
Typical Applications
DSPIC33EP128GM310-H/PT is suitable for 6 applications: Precision BLDC/PMSM Motor Control, Automotive Body and Actuator Control, Digital Power Conversion and Inverters, Industrial Automation and Sensor Nodes, Audio Signal Processing, Embedded Control Prototyping and Education.
Precision BLDC/PMSM Motor Control
The DSPIC33EP128GM310-H/PT fits motor control because its 70 MIPS DSP core executes single-cycle MAC instructions for field-oriented-control current loops, while the on-chip op amps and comparators condition shunt-resistor current feedback without external amplifiers. In a typical PMSM drive, PWM modules generate complementary three-phase gate signals at 20 kHz or above, the ADC samples phase currents synchronized to PWM triggers, and the FOC loop runs at 10-20 kHz inside the DSC. The AEC-Q100 qualification of the -H grade makes it suitable for automotive pumps, fans, and actuators, while 128 KB Flash holds the control stack plus a bootloader. Trade-off: at large VIN-VOUT deltas in gate-drive supplies, pair with isolated gate drivers rather than attempting direct drive.
Recommended
Automotive Body and Actuator Control
The -H/PT variant's AEC-Q100 qualification and extended -H temperature grade make it directly usable in automotive actuator nodes: throttle or valve actuation, wiper and pump control, and HVAC blowers. The 100-pin TQFP provides the I/O count needed for position sensors, limit switches, H-bridge PWM outputs, and LIN/CAN transceivers, with Peripheral Pin Select letting designers route UART and PWM functions to optimal pins during PCB layout. The 3.3V supply rail integrates cleanly with automotive low-voltage domains through a transient-suppressed 5V or 3.3V regulator. Design consideration: implement watchdog supervision and fail-safe PWM states in firmware, since automotive actuators require defined safe states during fault conditions per OEM functional-safety requirements.
Recommended
Digital Power Conversion and Inverters
The dsPIC33EP128GM310-H/PT is well suited to digitally controlled AC-DC, DC-DC, and solar micro-inverter stages: the 70 MIPS core closes voltage and current loops at tens of kHz, PWM modules produce phase-shifted or interleaved drive signals with programmable dead-time, and the 12-bit ADC samples feedback synchronized to the switching period to avoid switching-noise aliasing. The DSP MAC accelerates digital filters (PI, 3p3z, notch) that replace analog compensation networks, improving transient response and enabling adaptive control. On-chip comparators provide hardware cycle-by-cycle current limiting independent of CPU load - a key protection mechanism. Note the DSC's 3.3V logic must interface to gate drivers through level-shifting drivers; budget 128 KB Flash generously for compensation tables and diagnostics.
Recommended
Industrial Automation and Sensor Nodes
In factory automation nodes, the DSPIC33EP128GM310-H/PT serves as a smart sensor or I/O controller: the 100-pin package supplies enough UART/SPI/I2C ports (routed flexibly via Peripheral Pin Select) to bridge field sensors to a CAN or RS-485 backbone, while the DSP engine performs local FIR/IIR filtering on vibration or pressure signals, reducing upstream bandwidth. The extended -H temperature grade tolerates cabinet environments where electronics see elevated ambient temperatures near drives and motors. 128 KB Flash accommodates protocol stacks plus local data logging. Design tip: use the DMA controller for UART/SPI transfers so the CPU remains dedicated to control and filtering loops; enable the internal watchdog for autonomous recovery in unattended installations.
Recommended
Audio Signal Processing
The 70 MIPS DSP core with single-cycle MAC makes the DSPIC33EP128GM310-H/PT a cost-effective host for embedded audio functions: sample-rate conversion, biquad equalization, dynamic range compression, and simple active noise-control paths. Processing 16-bit audio at 48 kHz leaves substantial MIPS headroom within the 70 MIPS budget for multi-band processing, and the ADC inputs can accept microphone or line-level signals after simple anti-aliasing filters. The 100-pin TQFP exposes enough I/O for I2S-style codecs over SPI, rotary encoders for user interfaces, and display segments. Trade-off versus a dedicated audio DSP: the dsPIC33E offers lower system cost and single-chip control-plus-DSP integration, but lower absolute DSP throughput and no floating-point unit, so fixed-point algorithm implementation skill is required.
Recommended
Embedded Control Prototyping and Education
The DSPIC33EP128GM310-H/PT is a strong platform for advanced embedded education and prototyping of control systems, because it exposes the full dsPIC33E peripheral set in a single through-free 100-pin TQFP that can be mounted on breakout or custom boards. Multiple PGECx/PGEDx pairs support ICSP programming with low-cost MPLAB SNAP hardware (USB 2.0 to an 8-pin SIL connector), and free MPLAB X IDE plus the XC16 compiler remove toolchain cost barriers. Students implement motor FOC, digital power loops, and real-time DSP in one device. Practical note: wire ICSPCLK/ICSPDAT strictly from a matched PGECx/PGEDx pair and connect all VDD/VSS pins, per Microchip programming guidelines, to avoid failed erase/verify cycles during lab sessions.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33EP128GM310-H/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33EP128GM310-E/PT | DSPIC33EP256GM310-I/PT | DSPIC33EP64GM310-I/PT | DSPIC33EP128GM710-I/PT |
|---|---|---|---|---|---|
| Package | 100-TQFP (12x12) | 100-TQFP (12x12) - same | 100-TQFP (12x12) - same | 100-TQFP (12x12) - same | 100-TQFP (12x12) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Memory | 128 KB (43K x 24) | 128 KB | 256 KB | 64 KB | 128 KB |
| CPU Speed | 70 MIPS | 70 MIPS | 70 MIPS | 70 MIPS | 70 MIPS |
| Supply Voltage | 3.3 V | 3.3 V | 3.3 V | 3.3 V | 3.3 V |
| AEC-Q100 Automotive Grade | Yes (-H grade) | Yes (extended -E grade) | No (-I industrial) | No (-I industrial) | No (-I industrial) |
| On-chip Op Amps / Comparators | Yes | Yes | Yes | Yes | Different peripheral mix |
| Temperature Grade | -H extended (automotive) | -E extended (-40C to +125C) | -I (-40C to +85C) | -I (-40C to +85C) | -I (-40C to +85C) |
Key Differentiators
- Automotive AEC-Q100 qualification in -H grade (vs DSPIC33EP256GM310-I/PT)
- Larger firmware headroom than 64 KB variant (vs DSPIC33EP64GM310-I/PT)
- Motor-control peripheral emphasis with on-chip op amps (vs DSPIC33EP128GM710-I/PT)
Design Notes
Connect every VDD/VSS pair on the 100-pin TQFP; Microchip programming documentation requires all power pins connected during ICSP. Place a 100 nF ceramic decoupling capacitor at each VDD/VSS pair plus a bulk 4.7-10 uF capacitor near the supply entry. Keep the VPP/MCLR programming trace short and protected by a series resistor per ICSP guidelines so in-circuit debugging with MPLAB SNAP, ICD, or REAL ICE is reliable without removing the board from the system.
ICSP pairing error is the most frequent bring-up failure on dsPIC33EP parts: the device offers multiple PGECx/PGEDx pairs, and ICSPCLK/ICSPDAT must come from the SAME pair (e.g., PGEC2 with PGED2). Mixing pairs from different pins blocks programming and debugging. Additionally, do not leave analog-capable pins floating in noisy motor-control environments - configure unused analog inputs as outputs or tie them via pull resistors to prevent unintended comparator/ADC noise events.
When using Peripheral Pin Select (PPS), plan digital pin assignments before PCB routing: route PWM outputs away from ADC input traces used for current sensing, and use the synchronized sampling feature so ADC conversion triggers align with PWM center points, minimizing switching-noise-induced errors. Keep the oscillator (OSC1/OSC2) crystal traces short and guarded by ground. Estimated: with 20 kHz PWM and 10-20 kHz control loops, sampling phase errors of even 1 uS introduce measurable torque ripple in FOC drives - synchronization is not optional.
Compliance Information
Distributor listings (datasheets.com, FindIC, Hotenda) explicitly state Automotive, AEC-Q100 qualification for this MPN. RoHS/REACH/lead-free status should be confirmed via Microchip's Material Declaration on the official product page.