DSPIC33EP128GM710-I/PT - 16-bit 70 MIPS DSC 128KB | Microchip
MPN: DSPIC33EP128GM710-I/PT ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $7.15 | $7.15 |
| 10 | $6.62 | $66.20 |
| 100 | $6.25 | $625.00 |
| 500 | $5.9 | $2,950.00 |
| 1,000 | $5.55 | $5,550.00 |
DSPIC33EP128GM710-I/PT Overview
A digital signal controller combines the computational throughput of a digital signal processor with the deterministic control and rich peripheral set of a microcontroller. Within the power management hierarchy of embedded systems, a DSC sits above general-purpose MCUs in math-intensive real-time control loops, making the dsPIC33EP family a bridge between DSP ICs and 16-bit microcontrollers for closed-loop applications such as field-oriented motor control and digital power conversion.
Key features include 70 MIPS execution at 3.3V, integrated DSP engine with 40-bit accumulators and single-cycle MAC, up to 2 on-chip op-amps, 4 UARTs, 2 CAN 2.0B modules, 2 SPI, 3 I2C, 8 input-capture / 8 output-compare channels, 4 quadrature encoders (QEI), and dual ADC modules supporting concurrent sampling for precision motor control.
The dsPIC33E core features a 16-bit modified Harvard architecture with a 24-bit instruction word, DSP multiply-accumulate hardware, barrel shifter, and DMA channels that offload data movement from the CPU. Code protection, internal fast RC oscillators, and a Phase-Locked Loop (PLL) multiplier allow flexible clocking from 7.37 MHz internal FRC up to the 70 MIPS operating ceiling. Per the Microchip product page, the GM710 family with op-amps and CAN specifically targets high-performance precision motor control systems.
Typical applications include brushless DC and PMSM motor drives with sensorless field-oriented control, digital power supplies (PFC, LLC, inverter stages), industrial automation nodes using CAN, and embedded signal-processing equipment.
Design consideration: connect all VDD/VSS pairs and use any PGECx/PGEDx pair consistently for ICSP programming - the device supports in-circuit serial programming and debugging via MPLAB tools such as SNAP or ICD.
This page synthesizes verified distributor pricing, same-family drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for DSPIC33EP128GM710-I/PT — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33EP128GM710-I/PT (same form factor and footprint) — differing in Package, Core, CAN Modules, Communication Interfaces, Core Architecture.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33EP256GM710-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP64GM710-I/PT
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP128GM710-H/PT
✅ Drop-In✓ In Stock
Contact for price
View Datasheet →DSPIC33EP128GM710-I/MR
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33EP128GM710T-I/PT
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$4.74 / Unit
View Datasheet →DSPIC33EP128GM710-I/PT Maximum Ratings & Electrical Characteristics
| Core | dsPIC33E 16-bit DSC |
| Instruction Rate | 70 MIPS |
| Flash Program Memory | 128KB (43K x 24) |
| RAM | 16KB |
| Supply Voltage | 3.0 V to 3.6 V (3.3 V nominal) |
| Operating Temperature | -40C to +85C |
| Package | 100-TQFP (12x12 mm), 0.5 mm pitch |
| Mounting Type | Surface Mount |
| Interface Peripherals | I2C, SPI, UART/USART, IrDA, CAN 2.0B (x2) |
| UART Count | 4 |
| CAN Modules | 2 |
| Op-Amps (On-chip) | 2 |
| Input Capture / Output Compare | 8 / 8 |
| Quadrature Encoder Interfaces | 4 |
| Motor Control PWM | 12 channels |
| Programming Interface | ICSP via PGECx/PGEDx pairs |
| RoHS Status | Compliant |
DSPIC33EP128GM710-I/PT 100-tqfp (12x12 mm), 0.5 mm pitch Pin Configuration Guide
Pin configuration for DSPIC33EP128GM710-I/PT (100-tqfp (12x12 mm), 0.5 mm pitch package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for DSPIC33EP128GM710-I/PT.
Refer to the datasheet for full pin configuration.
Typical Applications
DSPIC33EP128GM710-I/PT is suitable for 6 applications: Sensorless FOC Motor Drives, Digital Power Conversion, Industrial Automation CAN Nodes, Embedded Audio and Signal Processing, Renewable Energy Inverters and Solar MPPT, Test, Measurement and Data Acquisition.
Sensorless FOC Motor Drives
The DSPIC33EP128GM710-I/PT fits precision motor control because its 70 MIPS DSP core executes field-oriented control loops with single-cycle multiply-accumulate, while 12 motor-control PWM channels provide complementary outputs with hardware dead-time for three-phase inverters. The 2 on-chip op-amps buffer low-side shunt currents, and dual ADC modules sample phase currents and bus voltage concurrently for sensorless rotor-position estimation. In a typical topology, the DSC drives a MOSFET gate-driver stage from the PWM outputs, reconstructs rotor angle from current observers running at 16 kHz or faster, and reports status over CAN. The 128KB Flash holds the FOC stack, protection routines, and a bootloader with margin to spare, and the 4 QEI modules support encoder-based fallback if sensorless startup is not required.
Recommended
Digital Power Conversion
For digital power supplies such as PFC, LLC, and inverter stages, the DSPIC33EP128GM710-I/PT provides fast PWM with precise duty resolution, dual high-speed ADCs synchronized to the PWM period, and a 70 MIPS core that closes voltage and current loops in firmware. The on-chip op-amps can amplify shunt or Hall sensor signals before ADC conversion, reducing external component count. The 2 CAN modules enable digital-power controllers to sit on industrial power-system buses for telemetry and setpoint control. Placed between sensing front-end and gate-driver circuitry, the DSC updates duty cycles once per switching cycle; the DSP MAC accelerates 3p3z and PID compensator calculations so loop bandwidth is limited by the PWM frequency, not the CPU. The 128KB Flash supports multiple protection profiles and firmware update routines in one device.
Recommended
Industrial Automation CAN Nodes
Industrial field nodes benefit from the DSPIC33EP128GM710-I/PT's 2 independent CAN 2.0B modules, which let a single controller bridge two bus segments or isolate diagnostics traffic from control traffic, alongside 4 UARTs for legacy RS-485/Modbus links. The 16KB RAM buffers messaging queues, while the DSP engine preprocesses vibration or current-signature data locally for predictive-maintenance signals. Rich I/O - 8 input captures, 8 output compares, and 4 quadrature encoders - connects encoders, limit switches, and actuators directly. Operating from -40C to +85C in a 100-pin TQFP, the part covers control cabinets and outdoor machinery enclosures alike. The ICSP programming interface (using a matched PGECx/PGEDx pair) allows field firmware updates without removing the board from the machine.
Recommended
Embedded Audio and Signal Processing
The DSPIC33EP128GM710-I/PT handles low- to mid-rate audio DSP: its single-cycle MAC, 40-bit accumulators, and dual addressing modes sustain FIR and IIR filtering well beyond voice-band sample rates, while the 128KB Flash stores coefficient tables and multiple algorithm sets. On-chip peripherals interface to codecs and amplifiers through SPI (up to 2 modules) and I2C (3 modules), and the 4 UARTs cover MIDI and control surface links. Because the DSC combines math throughput with deterministic interrupt latency, it performs filtering, tone generation, and system control in one part instead of a DSP plus a separate supervisory MCU. The 100-pin TQFP provides enough general-purpose I/O for keypads, displays, and status indicators typical of audio equipment front panels, and the 3.3V supply simplifies integration with digital audio devices.
Recommended
Renewable Energy Inverters and Solar MPPT
Solar MPPT controllers and small grid-tie inverters use the DSPIC33EP128GM710-I/PT's high-resolution PWM, concurrent dual ADC sampling, and 70 MIPS core to run maximum-power-point tracking alongside power-stage control in one device. The on-chip op-amps condition current-sensor outputs, and the DSP engine executes tracking and protection algorithms at multi-kHz rates. The 2 CAN modules connect the converter to battery-management and monitoring systems on industrial buses, while 4 UARTs support modems and dataloggers. The 128KB Flash stores MPPT algorithms, grid-compliance protection routines, and logging firmware together. Wide -40C to +85C operation suits rooftop combiner boxes and outdoor enclosures, and ICSP field programming enables in-place firmware upgrades as grid codes evolve. Designers should budget ADC timing so MPPT sampling does not collide with the current-loop control interrupt.
Recommended
Test, Measurement and Data Acquisition
Bench instruments and distributed data-acquisition nodes leverage the DSPIC33EP128GM710-I/PT's dual ADCs, DMA-driven sample streaming, and 70 MIPS DSP math for real-time filtering, RMS computation, and spectral analysis at the point of measurement. The 16KB RAM supports sample buffering, while DMA offloads transfers so the CPU stays available for control and communications. Connectivity is comprehensive: 4 UARTs, 2 SPI, 3 I2C, and 2 CAN modules interface to displays, storage, host PCs, and lab buses. Four QEI modules read position from rotary encoders directly, useful for instrumentation with mechanical inputs. The 100-pin TQFP exposes abundant I/O for multiplexed front-ends and relay control, and the industrial temperature range covers both benchtop and field-portable instruments. Firmware can combine acquisition, processing, and USB/UART reporting without an external processor.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33EP128GM710-I/PT — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33EP256GM710-I/PT | DSPIC33EP64GM710-I/PT | DSPIC33EP128GM710-H/PT | DSPIC33EP128GM710-I/MR |
|---|---|---|---|---|---|
| Package | 100-TQFP (12x12 mm) | 100-TQFP (12x12 mm) - same | 100-TQFP (12x12 mm) - same | 100-TQFP (12x12 mm) - same | 100-pin PQFP (same footprint family) |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Program Memory | 128KB (43K x 24) | 256KB | 64KB | 128KB | 128KB |
| RAM | 16KB | 16KB | 16KB | 16KB | 16KB |
| Core Speed | 70 MIPS | 70 MIPS | 70 MIPS | 70 MIPS | 70 MIPS (60 MHz clock) |
| CAN Modules | 2 | 2 | 2 | 2 | 2 |
| On-chip Op-Amps | 2 | 2 | 2 | 2 | 2 |
| Lifecycle Status | Active | Active | Active | Active | Active |
Key Differentiators
- Balanced 128KB Flash for complex control + bootloader (vs DSPIC33EP64GM710-I/PT)
- Cost-optimized memory size for high-volume motor drives (vs DSPIC33EP256GM710-I/PT)
- Industrial temperature grade for harsh environments (vs DSPIC33EP128GM710-H/PT)
Design Notes
Supply the DSPIC33EP128GM710-I/PT from a clean 3.3V rail (3.0-3.6V per datasheet). Connect ALL VDD and VSS pins - per Microchip's device documentation, leaving any supply pin unconnected can cause programming or operation failure. Decouple every VDD pin with 100 nF ceramics placed within 2-3 mm of the pin, plus bulk 10 uF near the chip. Separate the noisy PWM/gate-driver supply domain from the ADC reference supply; consider an LDO or ferrite filter for VDDCORE/ADC-referenced pins to preserve ADC accuracy in motor-control applications.
The 100-pin TQFP (12x12 mm, 0.5 mm pitch) requires careful fan-out: use 0.2-0.25 mm traces under the body, and place the ICSP connector so it reaches one PGECx/PGEDx pair. Remember the pair constraint - if you route ICSPCLK to PGEC2, ICSPDAT must go to PGED2; mixing pins from different pairs breaks ICSP. Reserve space for the debug header even in production designs. Route CAN transceiver lines and PWM outputs away from ADC input traces; keep analog sensing traces short and guarded by ground.
Clock configuration is the most common bring-up failure: the dsPIC33E boots from the internal 7.37 MHz FRC and must be switched to a PLL configuration (e.g., crystal + PLL or FRC + PLL) to reach 70 MIPS; an incorrect PLL divider combination causes the device to fail or run out of spec. Also verify oscillator fail-safe settings for safety-critical drives. When migrating firmware from dsPIC33F, note register and PPS (peripheral pin select) differences - most I/O must be explicitly mapped before peripherals function.
Compliance Information
RoHS compliant per distributor listing (OnlineComponents). Other declarations not stated in retrieved data - consult Microchip environmental compliance portal.
