DSPIC33EP128GM706-I/MR - 70 MIPS 16-bit DSC, 128KB Flash | Microchip
MPN: DSPIC33EP128GM706-I/MR ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $6.9 | $6.90 |
| 10 | $6.24 | $62.40 |
| 100 | $5.55 | $555.00 |
| 500 | $5.05 | $2,525.00 |
| 1,000 | $4.6 | $4,600.00 |
DSPIC33EP128GM706-I/MR Overview
A digital signal controller combines the compute throughput of a DSP with the peripheral integration and control-oriented architecture of a microcontroller. In the product hierarchy, the dsPIC33EP128GM706 sits within the dsPIC33EP family of DSCs, under 16-bit microcontrollers and the broader semiconductor MCU/DSP category. DSCs are the preferred choice for closed-loop control systems that require fast math on sampled data, such as field-oriented motor control and digital power conversion.
Key features include a 70 MIPS dsPIC DSC core with DSP engine (17-bit x 17-bit single-cycle MAC, 40-bit wide accumulator), dual 12-bit 500 ksps ADC modules supporting simultaneous multi-channel sampling, up to 12 MCPWM channels for motor control, 8 input capture and 8 output compare channels, 2 quadrature encoder interfaces (QEI), CAN 2.0B and multiple UART/SPI/I2C ports, integrated operational amplifiers, 4 DMA channels, and hardware real-time debugging with boundary scan support.
Architecturally, the device uses a modified Harvard 16-bit pipeline with separate program and data buses, a barrel shifter, and hardware loop constructs that sustain single-cycle MAC throughput. The 3.3V CMOS process keeps active current low while supporting an internal fast RC oscillator and PLL for full 70 MIPS operation without an external crystal.
Typical applications include brushless DC and PMSM motor drives (using the MCPWM, QEI, and op-amp peripherals), digital power supplies such as PFC and LLC converters, automotive and industrial CAN network nodes, and general precision sensing with on-chip 12-bit ADC conversion.
A key design consideration is power integrity: all VDD/VSS pairs must be decoupled and the exposed pad soldered to a ground plane for thermal and EMC performance. Programming via ICSP requires PGECx/PGEDx pairs used strictly as matched pairs.
This page synthesizes distributor pricing, drop-in family alternatives, pinout guidance, and practical design notes not found together in the manufacturer datasheet, refreshed as of 2026-09-23.
Drop-in alternatives for DSPIC33EP128GM706-I/MR — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33EP128GM706-I/MR (same form factor and footprint) — differing in Operating Temperature, Package, Program Memory (Flash), RAM, Communication Interfaces.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33EP128GM706T-I/MR
✅ Drop-In✓ In Stock
$4.9 / Unit
View Datasheet →DSPIC33EP128GM706-E/MR
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33EP128GM706-H/MR
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33EP256GM706-I/MR
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$4.35 / Unit
View Datasheet →DSPIC33EP64GM706-I/MR
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP128GM606-I/MR
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EP128GM706-I/MR Maximum Ratings & Electrical Characteristics
| Core | dsPIC33E 16-bit DSC core |
| Max CPU Speed | 70 MIPS (70 MHz) |
| Program Memory (Flash) | 128KB (43K x 24) |
| RAM | 16KB |
| Supply Voltage | 3.0 V to 3.6 V (3.3 V nominal) |
| Operating Temperature | -40C to +85C (industrial, I-grade) |
| Package | 64-VQFN (9x9 mm) with exposed pad, MR suffix |
| ADC | Dual 12-bit, up to 500 ksps |
| MCPWM Channels | 12 (motor control PWM) |
| Input Capture / Output Compare | 8 / 8 |
| Quadrature Encoder Interfaces | 2 (QEI) |
| CAN | CAN 2.0B |
| Communication Interfaces | UART, SPI, I2C, CAN |
| Op Amps | Integrated operational amplifiers |
| DMA Channels | 4 |
| Architecture | Modified Harvard, 16-bit, with 17x17 single-cycle MAC DSP engine |
| Mounting Type | Surface Mount |
| Programming / Debug | ICSP via PGECx/PGEDx pairs, boundary scan |
DSPIC33EP128GM706-I/MR 64-vqfn (9x9 mm) with exposed pad, mr suffix Pin Configuration Guide
Pin configuration for DSPIC33EP128GM706-I/MR (64-vqfn (9x9 mm) with exposed pad, mr suffix package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for DSPIC33EP128GM706-I/MR.
Refer to the datasheet for full pin configuration.
Typical Applications
DSPIC33EP128GM706-I/MR is suitable for 6 applications: Brushless DC / PMSM Motor Control, Digital Power Conversion (PFC / LLC), Industrial CAN Network Nodes, Precision Sensor Signal Acquisition, Automotive and E-Mobility Auxiliary Systems, Test, Measurement and DSP-Intensive Instruments.
Brushless DC / PMSM Motor Control
The DSPIC33EP128GM706-I/MR is purpose-built for field-oriented control (FOC) of BLDC and PMSM motors. Its 70 MIPS DSP core executes the Park/Clarke transforms and PI control loops with single-cycle 17x17 MAC operations, while 12 MCPWM channels generate complementary three-phase gate signals with hardware dead time. Two QEI modules read encoder position and two integrated op amps condition low-side shunt current signals into the dual 12-bit 500 ksps ADCs, enabling simultaneous phase-current sampling critical for stable FOC torque control. Typical designs run current loops at 10-20 kHz and speed loops at 1 kHz with margin to spare. Place the op-amp gain network close to the shunt resistors and route PWM lines away from analog inputs to preserve ADC accuracy.
Recommended
Digital Power Conversion (PFC / LLC)
In switch-mode power supplies such as PFC stages and LLC converters, the DSPIC33EP128GM706-I/MR provides the high-speed control bandwidth required. The 70 MIPS core sustains voltage and current loop execution at switching frequencies of 100-300 kHz, and the high-resolution MCPWM outputs offer fine duty-cycle resolution for tight output regulation. The dual 12-bit ADCs sample input current, output voltage, and temperature with DMA-driven transfers that eliminate loop-timing jitter. Its CAN interface allows digital power supplies to report telemetry in server and telecom rectifier systems. Because no cross-conduction protection hardware substitutes for careful firmware, enable hardware dead-time insertion and cycle-by-cycle current limiting in the MCPWM module for safe operation under fault conditions.
Recommended
Industrial CAN Network Nodes
The integrated CAN 2.0B controller makes the DSPIC33EP128GM706-I/MR an efficient industrial field-node processor. With the ECAN module handling message buffering and filtering in hardware and 4 DMA channels offloading data movement, the 70 MIPS core remains free for protocol processing, sensing, and local control. Typical nodes combine motor or actuator control with CANopen-style reporting: the GM706 runs the control loop locally and publishes status over CAN with deterministic latency. The 128KB Flash accommodates full CANopen stacks with headroom, and 16KB RAM buffers message FIFOs. Pair with a Microchip MCP2551 or MCP2562 transceiver; add common-mode chokes and TVS diodes on the bus lines for harsh industrial EMC environments.
Recommended
Precision Sensor Signal Acquisition
For multi-channel measurement systems, the DSPIC33EP128GM706-I/MR pairs its dual 12-bit 500 ksps ADCs with integrated operational amplifiers, allowing direct interface to low-level sensors such as pressure bridges and thermocouple front ends with minimal external circuitry. The DMA controller streams converted samples to RAM without CPU intervention, and the DSP engine applies digital filtering (FIR/IIR) at up to 70 MIPS throughput - useful for noise rejection in electrically noisy environments. The 128KB Flash stores calibration tables and compensation curves. Configure the ADC in simultaneous mode when channel-to-channel phase correlation matters, such as three-phase power metering, and use the internal reference or an external precision reference like the MCP1541 for best absolute accuracy.
Recommended
Automotive and E-Mobility Auxiliary Systems
Extended-temperature family variants (the -E/MR and -H/MR grade parts in the identical 64-VQFN footprint) let designs targeting automotive auxiliary systems - pumps, fans, actuators, and body-control motor loads - reuse the same PCB across temperature grades. The DSPIC33EP128GM706-I/MR base part covers under-hood-adjacent and industrial-vehicle environments at -40C to +85C. Its QEI inputs handle position feedback from automotive-style encoders, MCPWM drives DC and stepper actuators, and CAN integrates the node into vehicle networks via a transceiver. Design for functional safety by exploiting the watchdog timer, and use cycle-by-cycle current limit in the PWM module as a hardware-level fault response. Verify AEC-Q qualification requirements separately, as the standard 'I' grade part is industrial-rated.
Recommended
Test, Measurement and DSP-Intensive Instruments
Handheld instruments, data loggers, and embedded DSP modules benefit from the DSPIC33EP128GM706-I/MR's balance of signal processing and system control. The 70 MIPS core with barrel shifter and hardware multiply-accumulate accelerates FFT and digital-filter workloads far beyond typical 16-bit MCUs, while UART, SPI, and I2C ports interface displays, memory, and PC connectivity. Four DMA channels maintain glitch-free sample streaming from the dual 12-bit ADCs at up to 500 ksps per module. In portable designs, the 3.0-3.6V single-supply operation matches Li-ion battery rails via a small LDO. The boundary-scan capability supports production test on automated fixtures, and multiple PGECx/PGEDx pairs let firmware updates be performed in-system during calibration.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33EP128GM706-I/MR — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33EP128GM706T-I/MR | DSPIC33EP128GM706-E/MR | DSPIC33EP128GM706-H/MR | DSPIC33EP256GM706-I/MR | DSPIC33EP64GM706-I/MR |
|---|---|---|---|---|---|---|
| Package | 64-VQFN (9x9 mm, MR) with exposed pad | 64-VQFN (9x9 mm) - same | 64-VQFN (9x9 mm) - same | 64-VQFN (9x9 mm) - same | 64-VQFN (9x9 mm) - same | 64-VQFN (9x9 mm) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Core Speed | 70 MIPS | 70 MIPS | 70 MIPS | 70 MIPS | 70 MIPS | 70 MIPS |
| Flash Program Memory | 128KB (43K x 24) | 128KB | 128KB | 128KB | 256KB | 64KB |
| RAM | 16KB | 16KB | 16KB | 16KB | 16KB (27KB on some density variants - verify) | 16KB |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +125C | -40C to +150C (grade H) | -40C to +85C | -40C to +85C |
| Supply Voltage | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V |
Key Differentiators
- Maximum program memory in 64-pin footprint within the GM70x 64-pin family at this density point (vs DSPIC33EP64GM706-I/MR)
- Extended temperature availability on identical footprint (vs DSPIC33EP128GM706-E/MR)
- Exposed-pad VQFN for compact thermally enhanced boards (vs DSPIC33EP128GM706-I/ML (TQFP-64))
Design Notes
The MR package is a 64-pin VQFN (9x9 mm) with an exposed thermal pad that is also the primary ground connection. Solder the exposed pad to a solid ground plane with an array of thermal vias - do not leave it floating, as this degrades both thermal performance and ground integrity for the ADC and analog peripherals. All VDD/VSS pairs must each get a 100 nF ceramic decoupling capacitor placed within 2 mm of the pins, plus bulk 4.7-10 uF capacitance near the supply entry.
ICSP programming requires PGECx/PGEDx pairs used strictly as matched pairs - if PGEC2 carries ICSPCLK, ICSPDAT must connect to PGED2 (per NorthernSoftware dsPIC33EP128GM706 support notes). Mixing pairs from different sets prevents programming. Also reserve one pair on a header in production designs; in-circuit reprogramming is otherwise impossible without board rework. Ensure MCLR is pulled up through a 10k resistor and keep the programming traces short (<10 cm) for reliable operation.
When using the MCPWM for three-phase inverters, route PWM outputs away from the analog sensor inputs feeding the op amps and ADCs. Switching nodes carry high dV/dt that couples into the 12-bit ADC front end and corrupts current sampling. Use the ADC 'simultaneous sample' trigger synchronized to the MCPWM center of the low-side conduction interval, and add RC anti-alias filtering (e.g., 1k / 1 nF) on current-sense inputs. Ground the analog section at a single point under the exposed pad.
Compliance Information
RoHS and lead-free status based on standard current-production Microchip industrial-grade parts; confirm exact compliance certificates on the Microchip product page for this orderable part number.
