DSPIC33FJ128GP802T-I/SO - 16-bit DSC 40 MIPS 128KB Flash | Microchip
MPN: DSPIC33FJ128GP802T-I/SO ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $6.18 | $6.18 |
| 10 | $5.89 | $58.90 |
| 25 | $5.66 | $141.50 |
| 100 | $5.45 | $545.00 |
| 1,000 | $5.1 | $5,100.00 |
DSPIC33FJ128GP802T-I/SO Overview
A Digital Signal Controller combines the compute architecture of a digital signal processor with the peripheral set and ease of use of a microcontroller. Within the embedded hierarchy, the DSC sits between general-purpose MCUs and dedicated DSPs: it executes single-cycle MAC (multiply-accumulate) instructions with dual operand fetches like a DSP, while retaining flash memory, interrupts, and rich analog peripherals typical of an MCU. The dsPIC33F family is Microchip's mainstream 16-bit DSC line.
Key features include a modified Harvard, 16-bit RISC core with DSP engine, 8-channel DMA controller for data-intensive streaming, up to two 3.3V UARTs, SPI and I2C peripherals, a 10-bit ADC with up to 1.1 Msps throughput, and flexible output-compare/input-capture modules for motor control and PWM generation. In-circuit serial programming (ICSP) via the PGD/PGC pins simplifies field updates.
Architecturally, the device executes 40 MIPS from an internal PLL driven by the on-chip fast RC or external crystal oscillator. The MAC instruction fetches two operands from memory while multiplying two W registers and accumulating the result in a single cycle, which is central to FIR/IIR filtering and FFT workloads. The GP (General Purpose) variant emphasizes analog and communication peripherals over the motor-control (MC) variant.
Typical applications include digital power supplies, LED lighting control, audio signal processing, sensor conditioning, industrial automation nodes, and graphical LCD interfaces - a documented public project drives a 320x240 PG320240H-P9 graphical LCD directly from this part.
Design consideration: the 3V-3.6V supply rail is strict; provide local decoupling (100nF per VDD pin plus bulk capacitance) and keep AVDD/AVSS paired with VDD/VSS for ADC accuracy.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
Drop-in alternatives for DSPIC33FJ128GP802T-I/SO — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with DSPIC33FJ128GP802T-I/SO (same form factor and footprint) — differing in Core Architecture, DMA Channels, Package, Supply Voltage, Timers.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33FJ128GP802-I/SO
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33FJ128GP802T-E/SO
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DSPIC33FJ64GP802T-I/SO
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33FJ128GP202T-I/SO
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33FJ32GP302T-I/SO
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33EV32GM102-I/SO
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$2.35 / Unit
View Datasheet →DSPIC33FJ128GP802T-I/SO Maximum Ratings & Electrical Characteristics
| Core Architecture | 16-bit dsPIC33F modified Harvard RISC with DSP engine |
| Max CPU Speed | 40 MIPS |
| Program Memory | 128KB (128K x 8) Flash |
| SRAM | 16KB |
| Supply Voltage | 3 V to 3.6 V |
| Operating Temperature | -40C to +85C (industrial, I suffix) |
| Package | 28-SOIC (0.295 in, 7.50 mm width) |
| Mounting Type | Surface Mount |
| DMA Channels | 8 |
| ADC Resolution | 10-bit |
| Packaging | Tape and Reel (T suffix) |
| Programming Interface | ICSP via PGD/PGC (2-wire) |
| Oscillator | Internal fast RC with PLL, external crystal supported (OSC1/OSC2) |
| Communication Interfaces | UART, SPI, I2C |
| Timers | Multiple 16-bit timers with output compare / input capture modules |
DSPIC33FJ128GP802T-I/SO Pin Configuration
| Pin 1 | MCLR — Master clear reset, active low (tie via pullup for ICSP) |
| Pin 2 | AN0/VREF+/CN3/RB0 — Analog input 0 / positive ADC reference / change notification |
| Pin 3 | AN1/VREF-/CN2/RB1 — Analog input 1 / negative ADC reference / change notification |
| Pin 4 | PGD/AN2/SS1/CN4/RB2 — ICSP programming data / analog input 2 / SPI slave select |
| Pin 5 | PGC/AN3/IND1/CN5/RB3 — ICSP programming clock / analog input 3 / comparator input |
| Pin 6 | AN4/C1IN-/CN6/RB4 — Analog input 4 / comparator 1 inverting input |
| Pin 7 | AN5/C1IN+/CN7/RB5 — Analog input 5 / comparator 1 non-inverting input |
| Pin 8 | VSS — Digital ground |
| Pin 9 | OSC1/CLKI/CN30/RA2 — Crystal input / external clock input |
| Pin 10 | OSC2/CLKO/RC15 — Crystal output / clock output |
| Pin 11 | RP0/CN1/RB6 — Remappable pin 0 (alternate PGD), change notification |
| Pin 12 | RP1/CN0/RB7 — Remappable pin 1 (alternate PGC), change notification |
| Pin 13 | VDD — Positive supply (3V to 3.6V) |
| Pin 14 | RP2/RB8 — Remappable pin 2 / port B bit 8 (timer, UART functions) |
| Pin 15 | RP3/RB9 — Remappable pin 3 / port B bit 9 (timer, UART functions) |
| Pin 16 | RP4/RB10 — Remappable pin 4 / port B bit 10 |
| Pin 17 | RP5/RB11 — Remappable pin 5 / port B bit 11 |
| Pin 18 | VSS — Digital ground |
| Pin 19 | RP6/RB12 — Remappable pin 6 / port B bit 12 |
| Pin 20 | RP7/RB13 — Remappable pin 7 / port B bit 13 |
| Pin 21 | VDD — Positive supply (3V to 3.6V) |
| Pin 22 | RP10/RC2 — Remappable pin 10 / port C bit 2 |
| Pin 23 | RP11/C2IN- — Remappable pin 11 / comparator 2 inverting input |
| Pin 24 | RP12/C2IN+ — Remappable pin 12 / comparator 2 non-inverting input |
| Pin 25 | RP13/C1RX — Remappable pin 13 / comparator 1 receive (C1RX) |
| Pin 26 | SOSCI/CN1/RC13 — Secondary oscillator input / change notification / port C bit 13 |
| Pin 27 | AVSS — Analog ground (ADC domain) |
| Pin 28 | AVDD — Analog supply (ADC domain, 3V to 3.6V) |
Typical Applications
DSPIC33FJ128GP802T-I/SO is suitable for 6 applications: Digital Power Supplies, Industrial Automation and Sensing Nodes, Graphical LCD Interfaces, Audio Signal Processing, Motor Control and Lighting, Portable and Embedded Instrumentation.
Digital Power Supplies
The DSPIC33FJ128GP802T-I/SO fits digital power applications because its 40 MIPS DSP core executes control-loop mathematics with single-cycle MAC instructions, while the fast 10-bit ADC samples voltage and current feedback at rates up to roughly 1 Msps. Output-compare modules generate PWM with hardware-level timing independent of software jitter, critical for loop stability in buck, boost, and PFC stages. The 8-channel DMA streams ADC results to RAM without CPU intervention, reducing latency between sampling and duty-cycle updates. Running from 3V to 3.6V with industrial temperature range, it mounts directly on the controller daughterboard of a digital power supply. Trade-off: at 16KB SRAM, only moderate control history buffering is possible, suitable for single-loop or dual-loop designs.
Recommended
Industrial Automation and Sensing Nodes
For factory automation nodes, this DSC combines UART, SPI, and I2C connectivity with a 16-bit core at 40 MIPS, giving enough headroom to run Modbus or custom protocol stacks alongside real-time control tasks. The 128KB Flash accommodates protocol stacks, calibration tables, and OTA-style field update code, while the -40C to +85C industrial rating matches cabinet and floor-level environments. The 10-bit ADC with DMA handles multi-channel sensor acquisition without CPU polling, and ICSP two-wire programming enables field reprogramming through a simple connector. Compared with a plain 16-bit MCU, the DSP engine accelerates filtering of noisy industrial sensor signals (weighing, vibration, thermocouple linearization) using FIR/IIR routines. Design consideration: provide robust isolation on UART lines in electrically noisy factory environments.
Recommended
Graphical LCD Interfaces
The DSPIC33FJ128GP802T-I/SO is a proven choice for driving parallel graphical LCDs; a documented public project controls a 320x240 PG320240H-P9 panel directly from this exact part. With 40 MIPS execution, the DSC can refresh LCD pixels through its parallel port or remappable pins fast enough for UI panels, gauges, and simple animations, while the 128KB Flash stores font tables, icon bitmaps, and rendering code. The 16KB SRAM buffers frame regions, enabling partial redraw strategies that avoid full-frame external RAM. Its 3.3V logic levels match most modern TFT and mono graphic panels, and output-compare modules can supply LCD backlight PWM dimming. Note: 16KB SRAM limits full-frame buffering at 320x240 monochrome, so use line- or tile-based rendering for complex scenes.
Recommended
Audio Signal Processing
Audio applications benefit directly from this part's DSP engine: the MAC instruction fetches two operands while multiplying and accumulating in a single cycle, which sustains FIR and IIR filters for equalization, crossover, and audio effect processing at the 40 MIPS core rate. The 128KB Flash stores filter coefficient sets, a USB-serial or UART audio transport layer, and multiple preset curves. The 10-bit ADC with DMA can digitize line-level audio for monitoring and simple analysis, although demanding 16-bit fidelity designs should pair an external audio codec over I2C/SPI. Its 3.3V supply matches typical codec I/O levels, simplifying interfacing. Trade-off: the GP802 lacks a dedicated audio codec, so for hi-fi THD targets, connect an external codec rather than relying on the internal 10-bit converter.
Recommended
Motor Control and Lighting
This DSC suits LED lighting drivers, BLDC commutation helpers, and small motor controllers through its multiple output-compare PWM channels, input-capture modules for rotor position feedback, and fast ADC for current sensing. The 40 MIPS core closes current loops fast enough for low-inductance LED strings and small motors, while hardware PWM keeps switching edges deterministic. The 8-channel DMA pipelines current and voltage samples into memory for cycle-by-cycle limit checking in firmware. The -40C to +85C range covers enclosed luminaires and outdoor drivers, and the 28-SOIC footprint fits compact driver boards. Consideration: for three-phase brushless drives requiring complementary PWM with dead time, Microchip's MC-series dsPIC33 variants provide dedicated motor-control PWM - verify topology before committing to the GP variant.
Recommended
Portable and Embedded Instrumentation
Bench instruments, data loggers, and handheld measurement tools use the DSPIC33FJ128GP802T-I/SO for its balance of compute and analog: the 10-bit ADC digitizes sensor front ends, the DSP core averages and filters measurements in real time, and UART/USB-bridge links stream results to a PC. The 128KB Flash supports menus, calibration constants, and logging routines, while the internal oscillator with PLL reduces BOM count by eliminating the external crystal in non-timing-critical designs. ICSP programming allows firmware updates in the field through a two-wire header. The 3V-3.6V rail is straightforward from LDO sources in battery instruments. Trade-off: 16KB SRAM caps buffering depth for high-rate logging; offload to external SPI SRAM/Flash when longer capture windows are required.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33FJ128GP802T-I/SO — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33FJ128GP802-I/SO | DSPIC33FJ128GP802T-E/SO | DSPIC33FJ64GP802T-I/SO | DSPIC33FJ128GP202T-I/SO | DSPIC33FJ32GP302T-I/SO | DSPIC33EV32GM102-I/SO |
|---|---|---|---|---|---|---|---|
| Package | 28-SOIC (7.50mm) | 28-SOIC (7.50mm) - same | 28-SOIC (7.50mm) - same | 28-SOIC (7.50mm) - same | 28-SOIC (7.50mm) - same | 28-SOIC (7.50mm) - same | 28-SOIC (7.50mm) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Program Memory | 128KB | 128KB | 128KB | 64KB | 128KB | 32KB | 32KB |
| CPU Speed | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 40 MIPS | 70 MIPS |
| Operating Temperature | -40C to +85C (I grade) | -40C to +85C | -40C to +125C (E grade) | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
| Supply Voltage | 3V to 3.6V | 3V to 3.6V | 3V to 3.6V | 3V to 3.6V | 3V to 3.6V | 3V to 3.6V | 3V to 3.6V |
| Analog Feature Set | 10-bit ADC + comparators (GP802) | 10-bit ADC + comparators - same | 10-bit ADC + comparators - same | 10-bit ADC + comparators - same | Reduced analog (GP202) | 10-bit ADC (GP302) | 12-bit ADC (EV family) |
| Packaging Delivery | Tape & Reel (T) | Tube | Tape & Reel | Tape & Reel | Tape & Reel | Tape & Reel | Tube |
Key Differentiators
- Maximum program memory in the 28-pin dsPIC33FJ family (vs DSPIC33FJ64GP802T-I/SO)
- Full analog feature set with comparators (vs DSPIC33FJ128GP202T-I/SO)
- Higher-performance successor available in same footprint (vs DSPIC33EV32GM102-I/SO)
Design Notes
Supply the 3V-3.6V rail with an LDO and decouple each VDD pin (13, 21) with a 100nF ceramic placed within 5mm, plus a 4.7uF-10uF bulk capacitor near the device. Feed AVDD (pin 28) from VDD through a ferrite bead with a separate 100nF plus 1uF to keep ADC noise low; tie AVSS (pin 27) to a clean analog ground island connected to digital ground at a single point. The internal regulator on dsPIC33F devices also requires its designated decoupling per the datasheet power section - do not omit it.
Keep MCLR (pin 1) routed with a 10k pullup to VDD and a 100nF to ground near the pin; expose it on a 5-pin ICSP header (MCLR, VDD, GND, PGD pin 4, PGC pin 5) so in-circuit programming and debugging with PICkit or ICD tools works without removing the board from the enclosure. Avoid routing PGD/PGC through connectors that may be loaded during operation, since the same pins double as RB2/RB3 I/O after boot.
Three frequent issues with this part: (1) exceeding the 3.6V absolute supply limit - 5V on any pin damages the device; use level shifting for 5V peripherals. (2) Configuration-bit mismatch: oscillator and watchdog settings live in config words written at flash time; incorrect oscillator config can leave the PLL unlocked and the core at the wrong MIPS rate. (3) Remappable RP pins default to non-connected - every peripheral pin (UART, SPI, PWM) must be assigned in code via the PPS registers, or the peripheral appears dead on the bench.
Compliance Information
Compliance certificates were not present in the verified web data snapshot; confirm on the Microchip product page for DSPIC33FJ128GP802T-I/SO before production.
