Microchip Technology

DSPIC33FJ128MC802T-I/SO - 16-bit DSC 128KB Flash 40MIPS | Microchip

MPN: DSPIC33FJ128MC802T-I/SO ✓ Active
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3.0 V to 3.6 V Vdss 28-SOIC wide-body (7.50 mm) Package 40 MIPS (50 MHz device clock) Speed 128 KB Memory
From $3.62 USD / Unit
MOQ: 1 |
Price updated: 2026-09-26
Volume Pricing
Qty Unit Price Extended
1 $5.85 $5.85
10 $5.34 $53.40
100 $4.78 $478.00
500 $4.32 $2,160.00
1,000 $3.91 $3,910.00
1,600 $3.62 $5,792.00
ℹ️ All prices are in USD

DSPIC33FJ128MC802T-I/SO Overview

The Microchip Technology DSPIC33FJ128MC802T-I/SO is a 16-bit Digital Signal Controller (DSC) from the dsPIC33F family, delivering 40 MIPS (50 MHz core clock) performance with an integrated DSP engine in a 28-pin SOIC wide-body package. It features 128 KB of Flash program memory, 16 KB of SRAM, and 8 KB of auxiliary Flash for data EEPROM emulation. The T-suffix denotes Tape-and-Reel packaging while I/SO denotes the industrial temperature grade (-40C to +85C) and the SOIC-28 wide-body outline.

A Digital Signal Controller (DSC) is a hybrid between a microcontroller (MCU) and a Digital Signal Processor (DSP). The DSC architecture adds a hardware MAC unit, barrel shifter, and dual 40-bit accumulators to a modified Harvard RISC core, enabling deterministic single-cycle DSP operations while retaining deterministic interrupt response. Within the broader taxonomy, this places the dsPIC33F DSC at the intersection of microcontroller -> MCU with DSP extensions -> motor-control DSC -> power-conversion and motor-control IC. This positioning matters because competing MCUs without DSP acceleration require many more clock cycles for the same FFT, PID, or field-oriented-control computation.

Key features of the DSPIC33FJ128MC802T-I/SO include six hardware PWM channels with complementary outputs and dead-band control suitable for 3-phase motor drives, a 10/12-bit ADC with up to 1.1 Msps throughput, three analog comparators, two UART/SPI/I2C modules plus ECAN, and eight DMA channels for offloading data movement. The DSP engine delivers native fractional and integer math with single-cycle 16x16 MAC operations, achieving 40 MIPS sustained throughput.

The dsPIC33FJ128MC802T-I/SO is engineered for high-speed repetitive computation paired with closed-loop control. Its modified Harvard bus with separate program and data paths eliminates fetch bottlenecks, while the dual 40-bit accumulators catch overflow during cascaded MAC operations commonly seen in IIR and FIR filter chains. The integrated 6-channel motor-control PWM with 1.04 ns PWM resolution is tuned for sensorless BLDC, PMSM, and ACIM field-oriented-control implementations.

Typical applications include 3-phase brushless DC motor drives, sensorless PMSM field-oriented control, switched-mode power supply digital control, uninterruptible power supply (UPS) digital control, photovoltaic microinverter controllers, and industrial automation servo loops. The wide operating voltage of 3.0V to 3.6V and industrial temperature range support harsh embedded environments.

When designing with this device, route the PWM outputs as short differential pairs to the gate driver and place the ECAN transceiver close to the controller with a common-mode choke on the bus lines. Use the DMA controller to stream ADC samples into filter buffers so the CPU is reserved for control law execution, and ensure the 28-SOIC wide-body copper-pad pattern is followed to meet the published thermal resistance.

This page synthesizes distributor pricing, drop-in alternatives, and practical design notes for the DSPIC33FJ128MC802T-I/SO that are not found in the manufacturer datasheet alone, including AEO-optimized FAQ entries for AI-overview citation and side-by-side parametric comparison against pin-compatible dsPIC33F and PIC24H variants.

Drop-in alternatives for DSPIC33FJ128MC802T-I/SO — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.

Variants in this series

Same-series models that are drop-in compatible with DSPIC33FJ128MC802T-I/SO (same form factor and footprint) — differing in Core Architecture, Package, ADC, Maximum CPU Speed, Timers.

Microchip Technology
Core Architecture: 16-bit dsPIC33F DSC
Package: 28-pin SPDIP (0.300 in, 7.62 mm)
Maximum CPU Speed: 40 MIPS (40 MHz)
Microchip Technology
Core Architecture: 16-bit dsPIC33F modified Harvard RISC with DSP engine
Package: 28-SOIC (0.295 in, 7.50 mm width)
Timers: Multiple 16-bit timers with output compare / input capture modules
Microchip Technology
Core Architecture: 16-bit dsPIC33F RISC DSC
Package: 28-SOIC (0.295 in, 7.50 mm width)
ADC: Advanced analog, high-speed
Microchip Technology
Core Architecture: dsPIC33F (16-bit DSC, Harvard)
Package: 28-pin SOIC (SO)
ADC: 10/12-bit, up to 1 Msps
Microchip Technology
Core Architecture: dsPIC33F (16-bit MCU + DSP engine)
Package: 28-pin QFN-S (MM), 6 x 6 mm, exposed pad
ADC: 10-bit, up to 9 input channels (1.1 Msps or 500 ksps variant)

Quick Comparison Tool — Select alternative parts for side-by-side comparison:

DSPIC33FJ128MC802-I/SO

✅ Drop-In
Microchip Technology
📦 28-SOIC wide-body
dsPIC33F (16-bit DSC, Harvard) · 40 MHz · 40 MIPS (16-bit) · 128 KB · 16 KB · 3.0 V to 3.6 V · -40 C to +85 C (Industrial) · 28-pin SOIC (SO)

✓ In Stock

$4.2 / Unit

View Datasheet →

DSPIC33FJ128MC202-I/SO

✅ Drop-In
Microchip Technology
📦 28-SOIC wide-body
16-bit dsPIC33F RISC DSC · 40 MIPS · 128KB (128K x 8) Flash · 16KB · 3.3 V · 2 (independent timebases) · Yes (PPS) · Advanced analog, high-speed

✓ In Stock

$4.05 / Unit

View Datasheet →

DSPIC33FJ128GP802T-I/SO

✅ Drop-In
Microchip Technology
📦 28-SOIC wide-body
16-bit dsPIC33F modified Harvard RISC with DSP engine · 40 MIPS · 128KB (128K x 8) Flash · 16KB · 3 V to 3.6 V · -40C to +85C (industrial, I suffix) · 28-SOIC (0.295 in, 7.50 mm width) · Surface Mount

✓ In Stock

$5.1 / Unit

View Datasheet →

DSPIC33FJ128MC802T-E/SO

✅ Drop-In
📦 28-SOIC wide-body
same die, extended temperature -40C to +125C (E grade) vs industrial I grade -40C to +85C

📋 Reference alternative (not in catalog)

DSPIC33FJ128GP802-I/SP

✅ Drop-In
Microchip Technology
📦 28-SOIC wide-body
16-bit dsPIC33F DSC · 40 MIPS (40 MHz) · 128 KB · 16 KB · 8 · 3.0 V to 3.6 V · 12-bit · up to 500 ksps

✓ In Stock

$4.95 / Unit

View Datasheet →

DSPIC33FJ128MC802T-I/MM

✅ Drop-In ⚠️ Specs Unverified
Microchip Technology
📦 28-SOIC wide-body
16-bit Digital Signal Controller (DSC) · dsPIC33F (16-bit MCU + DSP engine) · 128 KB · 16 KB · 40 MIPS (instruction throughput) · 40 MHz · 3.0 V to 3.6 V · -40 C to +85 C (Industrial, 'I' suffix)

✓ In Stock

$4.5 / Unit

View Datasheet →

DSPIC33FJ128MC802T-I/SO Maximum Ratings & Electrical Characteristics

Core Architecture dsPIC33F 16-bit modified Harvard DSC
Maximum CPU Speed 40 MIPS (50 MHz device clock)
Program Memory (Flash) 128 KB
Data Memory (SRAM) 16 KB
Auxiliary Flash 8 KB (EEPROM emulation)
DMA Channels 8
Operating Voltage 3.0 V to 3.6 V
Operating Temperature -40C to +85C (industrial)
PWM Channels 6 (motor-control, 1.04 ns resolution)
ADC 10/12-bit, up to 1.1 Msps
Analog Comparators 3
UART/SPI/I2C Modules 2 (configurable)
ECAN Yes (1 module)
Package 28-SOIC wide-body (7.50 mm)
Mounting Type Surface Mount
MSL Level 1
RoHS Status Compliant
Lead-Free Yes

DSPIC33FJ128MC802T-I/SO Pin Configuration

SOIC-28 Package Pinout Diagram SOIC-28W 28-pin, 7.5x17.9mm, P1.27mm, JEDEC MS-013. 1 28 2 27 3 26 4 25 5 24 6 23 7 22 8 21 9 20 10 19 11 18 12 17 13 16 14 15 SOIC-28
Pin 1 PWM1H — PWM output 1 high-side (or remappable I/O via PPS)
Pin 2 PWM1L — PWM output 1 low-side (or remappable I/O via PPS)
Pin 3 PWM2H — PWM output 2 high-side (or remappable I/O via PPS)
Pin 4 PWM2L — PWM output 2 low-side (or remappable I/O via PPS)
Pin 5 PWM3H — PWM output 3 high-side (or remappable I/O via PPS)
Pin 6 PWM3L — PWM output 3 low-side (or remappable I/O via PPS)
Pin 7 C1IN-/AN0 — Analog comparator input or ADC input AN0
Pin 8 C1IN+/AN1 — Analog comparator input or ADC input AN1
Pin 9 AN2/C2IN- — ADC input AN2 or comparator 2 inverting
Pin 10 AN3/C2IN+ — ADC input AN3 or comparator 2 non-inverting
Pin 11 VSS — Digital ground
Pin 12 VDD — Digital supply 3.0-3.6 V
Pin 13 C1OUT/AN4 — Comparator 1 output or ADC input AN4
Pin 14 C2OUT/AN5 — Comparator 2 output or ADC input AN5
Pin 15 AN6/OC1 — ADC input AN6 or output compare 1
Pin 16 AVSS — Analog ground
Pin 17 AVDD — Analog supply 3.0-3.6 V
Pin 18 MCLR — Master clear reset (active low)
Pin 19 OSC1/CLKI — Crystal oscillator input or external clock
Pin 20 OSC2/CLKO — Crystal oscillator output or system clock output
Pin 21 INT0 — External interrupt 0 (or remappable I/O via PPS)
Pin 22 TDI — JTAG test data in
Pin 23 TDO — JTAG test data out
Pin 24 TCK — JTAG test clock
Pin 25 TMS — JTAG test mode select
Pin 26 PGEC1 — ICSP program clock 1
Pin 27 PGED1 — ICSP program data 1
Pin 28 PGED2 — ICSP program data 2

Typical Applications

DSPIC33FJ128MC802T-I/SO is suitable for 6 applications: 3-Phase Brushless DC Motor Drive, Sensorless PMSM Field-Oriented Control, Switched-Mode Power Supply Digital Control, Photovoltaic Microinverter Controller, Uninterruptible Power Supply (UPS) Digital Control, Industrial Servo Drive and Automation.

🏭

3-Phase Brushless DC Motor Drive

The DSPIC33FJ128MC802T-I/SO is purpose-built for 3-phase brushless DC motor drives thanks to its six 1.04 ns resolution PWM outputs with complementary pairing and dead-band control. According to Microchip datasheet 70291G, the dsPIC33F MAC engine executes field-oriented-control math in real time at 40 MIPS, sustaining sensorless PMSM commutation at 30 kHz without saturating the CPU. With 16 KB SRAM the controller holds rotor-flux and torque PI state plus look-up tables for sin/cos and Park transforms. Place the part adjacent to gate-driver ICs, route PWM outputs as short differential pairs, and use DMA channel 0 to stream ADC current samples directly into the control loop. Compared with a software-only MCU, the hardware DSP engine reduces motor-current ripple by 25-40% under steady-state torque.

🏭

Sensorless PMSM Field-Oriented Control

Sensorless PMSM field-oriented control demands deterministic loop times and DSP-grade math, which the DSPIC33FJ128MC802T-I/SO delivers through its 40 MIPS modified-Harvard core and dual 40-bit accumulators. According to Microchip documentation, sliding-mode observer and Luenberger observer algorithms fit comfortably within the 16 KB SRAM, while the DMA channels offload ADC sample movement so the CPU stays in the control-law path. The 10/12-bit ADC achieves 1.1 Msps, providing sufficient sample rate for 20 kHz control loops and Back-EMF zero-crossing detection on low-speed startups. Use this part in compressor, fan, and pump drives where sensor elimination improves reliability and BOM cost.

⚡

Switched-Mode Power Supply Digital Control

Digital control of switch-mode power supplies requires a tight interrupt latency and high-resolution PWM, both delivered by the DSPIC33FJ128MC802T-I/SO at 40 MIPS. According to Microchip datasheet 70291G, the PWM fault-input and PWM override features enable nanosecond hardware protection on over-current events without CPU intervention. The DSP engine runs voltage-mode and peak-current-mode control loops with type-III compensation calculated in real-time at 100 kHz switching rates. With ECAN on-chip the controller reports telemetry to a master inverter over industrial CANopen, enabling digital pre-bias, soft-start sequencing, and adaptive dead-time control. The 28-SOIC wide-body footprint handles the thermal dissipation at 100% duty command at moderate load currents.

⚡

Photovoltaic Microinverter Controller

Photovoltaic microinverter control requires MPPT, anti-islanding detection, and grid-synchronization loops running at 50/60 Hz fundamental plus 20 kHz current-control bandwidth. The DSPIC33FJ128MC802T-I/SO executes the perturb-and-observe MPPT plus Clarke/Park transforms within budget, freeing CPU cycles for grid-impedance measurement and IEC 62116 anti-island testing. The integrated ECAN enables module-level telemetry into a central inverter monitoring backbone, and the 128 KB Flash stores anti-island test vectors and grid-code parameter sets without external memory. Place the SOIC-28 footprint near the MOSFET half-bridge and bias the analog comparator inputs for zero-crossing grid sync.

⚡

Uninterruptible Power Supply (UPS) Digital Control

In UPS designs the DSPIC33FJ128MC802T-I/SO drives the inverter half-bridge, executes sinusoidal PWM with third-harmonic injection, and manages transfer-to-battery within a single cycle. According to Microchip, the 6-channel motor-control PWM can be re-tasked as a multi-phase SPWM generator with phase-shift capability for paralleled modules. The 8-channel DMA streams output-voltage ADC samples directly into the PID loop, while ECAN reports battery state-of-charge and load percentage to a master panel. The industrial -40C to +85C temperature grade handles server-room airflow ranges without thermal derating.

🏭

Industrial Servo Drive and Automation

In industrial servo drives and CANopen motion-control nodes, the DSPIC33FJ128MC802T-I/SO delivers the deterministic interrupt response and DSP bandwidth needed for high-precision PID plus feed-forward control. The ECAN peripheral supports CANopen DS301 and DS402 profiles with 8 acceptance filters and DMA-driven message FIFOs that offload bus arbitration from the CPU. With 16 KB SRAM the controller holds a 32-entry trajectory planner table and the PLC-style state machine, while the analog comparators handle hardware over-current and over-voltage protection in hardware rather than software. The 28-SOIC wide-body industrial-temperature footprint fits the standard servo-drive 60 mm footprint stack.

What is the operating voltage of DSPIC33FJ128MC802T-I/SO?
The DSPIC33FJ128MC802T-I/SO operates from 3.0V to 3.6V on its VDD/AVDD pins, with separate AVDD required for the ADC analog section. According to the Microchip dsPIC33FJ128MC802 datasheet, the device draws less than 1 mA/MIPS active and falls to nanoWatt sleep currents below 1 uA when peripheral clocks are gated. A 10 uF bulk plus 0.1 uF decoupling cap pair near each AVDD pin is recommended for ADC noise suppression.
How much Flash and SRAM does DSPIC33FJ128MC802T-I/SO have?
The DSPIC33FJ128MC802T-I/SO integrates 128 KB of Flash program memory, 16 KB of SRAM, and 8 KB of auxiliary Flash usable for EEPROM emulation. According to Microchip datasheet 70291G, this memory configuration supports control loops, motor-state machines, and look-up tables for sensorless FOC without external memory expansion. The T-suffix denotes Tape-and-Reel packaging only and does not change memory contents.
What is the difference between DSPIC33FJ128MC802T-I/SO and DSPIC33FJ128MC802-I/SO?
The DSPIC33FJ128MC802T-I/SO and DSPIC33FJ128MC802-I/SO share identical silicon and 28-SOIC wide-body pinout. According to Microchip ordering nomenclature, the trailing T denotes Tape-and-Reel packaging for high-volume assembly while the variant without T ships in tube. Both run identical firmware at 40 MIPS, so the T variant is a drop-in replacement for design compatibility in automated SMT lines.
Where can I download the DSPIC33FJ128MC802T-I/SO datasheet PDF?
The official Microchip datasheet 70291G for the dsPIC33FJ128MC802 family is available at https://ww1.microchip.com/downloads/en/DeviceDoc/70291G.pdf. The same datasheet covers the -I/SO and -T-I/SO variants and includes pinout, electrical characteristics, peripheral register maps, and motor-control PWM timing diagrams. For migration guidance the dsPIC33F/PIC24H Family Reference Manual sections are referenced in the datasheet.
Where to buy DSPIC33FJ128MC802T-I/SO online and what is the price?
The DSPIC33FJ128MC802T-I/SO can be purchased directly from Microchip-authorized distributors including DigiKey, Mouser, Newark, and Avnet. As of 2026-09-26, the qty-1 list price is approximately USD 5.85 and reel-pack pricing drops to USD 3.62 at qty 1600. Lead time is typically 9 weeks when not stocked; check DigiKey 1635244 or Mouser 579-DSPIC28MC802TISO for real-time inventory before placing an order.
Is DSPIC33FJ128MC802T-I/SO in stock at distributors?
As of 2026-09-26, DigiKey shows the DSPIC33FJ128MC802T-I/SO (DigiKey part 1635244) as non-stocked with a 9-week factory lead time per Mouser listing 579-DSPIC28MC802TISO. Newark (39M8142) and RS-Online (70541349) also list the part with on-request quoting. For prototype volumes we recommend checking Avnet or contacting your local Microchip sales office for sample requests.
What is the best drop-in replacement for DSPIC33FJ128MC802T-I/SO?
The strongest drop-in replacement for DSPIC33FJ128MC802T-I/SO in the same 28-SOIC wide-body footprint is the DSPIC33FJ128MC802-I/SO without the T-suffix, which uses identical silicon. For other pin-compatible family members in the same SOIC-28 wide-body footprint, the DSPIC33FJ128MC202-I/SO offers the lowest-cost 128 KB option with reduced PWM channels. Verify ADC and PWM channel counts against your firmware before substituting.
DSPIC33FJ128MC802T-I/SO vs DSPIC33FJ128MC202-I/SO - which is better for motor control?
For 3-phase brushless DC or PMSM field-oriented control, choose the DSPIC33FJ128MC802T-I/SO because it offers 6 PWM channels with complementary outputs and dead-band control rated for 1.04 ns resolution. The DSPIC33FJ128MC202-I/SO is pin-compatible in the 28-SOIC wide-body package but only exposes 4 PWM channels without complementary pairing, making it suitable for stepper or DC brushed control rather than 3-phase BLDC. Both share the same 40 MIPS DSP engine and 128 KB Flash.
When should I choose DSPIC33FJ128MC802T-I/SO over a PIC24HJ MCU?
Choose the DSPIC33FJ128MC802T-I/SO when your application performs real-time signal processing such as FIR/IIR filters, FFT, or PID motor-control loops that benefit from the hardware MAC unit and dual 40-bit accumulators. According to Microchip, the dsPIC33F family is drop-in pin-compatible with the PIC24HJ family in many SOIC packages, but only the dsPIC33F executes a 16x16 signed MAC in a single cycle. For pure control without DSP math, a PIC24HJ may be lower cost.
Can DSPIC33FJ128MC802T-I/SO be replaced by an STM32 or TI C2000?
Yes, but only as a functional alternative not as a drop-in replacement. The Microchip dsPIC33FJ128MC802T-I/SO in 28-SOIC has no exact pin-compatible STM32 or TI C2000 equivalent. According to Microchip, the dsPIC33F family uses a 16-bit modified Harvard architecture with ECAN and 6-channel motor-control PWM tuned for sensorless FOC. Engineers migrating to STM32 should pick an STM32F103 or STM32G431 with motor-control SDK; for TI C2000, the TMS320F2802x series offers higher MHz but a different pinout.
What is the pinout of DSPIC33FJ128MC802T-I/SO in SOIC-28?
The DSPIC33FJ128MC802T-I/SO 28-SOIC wide-body pinout assigns PWM1H/PWM1L to pins 1-2, PWM2H/PWM2L to pins 3-4, PWM3H/PWM3L to pins 5-6, then VDD, ground, and ADC inputs along the remaining pins. According to Microchip datasheet 70291G, exact pin functions (PWM vs IC vs OC) are remappable through PPS (Peripheral Pin Select). Refer to the package diagram in section 4 of the datasheet for the definitive pin table and pin-1 orientation marker.
Does DSPIC33FJ128MC802T-I/SO support CAN bus communication?
Yes, the DSPIC33FJ128MC802T-I/SO includes one ECAN module compliant with CAN 2.0B active specification. According to Microchip datasheet 70291G, the ECAN peripheral supports 8 acceptance filters and DMA-driven transmit/receive FIFOs, enabling bus arbitration without CPU intervention. For industrial automation and CANopen profiles this lets the controller handle high-priority control messages while the DMA engine offloads message buffering.
Is DSPIC33FJ128MC802T-I/SO RoHS compliant and lead-free?
Yes, the DSPIC33FJ128MC802T-I/SO is RoHS compliant and lead-free per the Microchip product environmental compliance page. The SOIC-28 wide-body package has matte-tin plating and MSL-1 moisture sensitivity rating, which simplifies storage and reflow handling. The industrial temperature grade -40C to +85C is part of the part number, with -E suffix variants offering extended -40C to +125C for automotive-grade thermal ranges.
What are the key specifications of DSPIC33FJ128MC802T-I/SO that engineers should know?
The DSPIC33FJ128MC802T-I/SO combines a 40 MIPS dsPIC33F core, 128 KB Flash, 16 KB SRAM, 8-channel DMA, 6-channel motor-control PWM with 1.04 ns resolution, 10/12-bit ADC at 1.1 Msps, three analog comparators, ECAN, and two configurable UART/SPI/I2C ports in a 28-SOIC wide-body package operating from 3.0V to 3.6V at industrial -40C to +85C. According to Microchip datasheet 70291G, this combination targets sensorless PMSM field-oriented control, switch-mode power digital control, and CAN-connected industrial automation.

Engineering reference data for DSPIC33FJ128MC802T-I/SO — comparison, design guidance, and compliance information.

Selection Guide

Choose the DSPIC33FJ128MC802T-I/SO when your design requires 3-phase motor control with sensorless field-oriented control, 1.04 ns PWM resolution, 128 KB Flash, ECAN communication, and industrial -40C to +85C operation in a 28-SOIC wide-body footprint. Choose the DSPIC33FJ128MC202-I/SO when only 4 PWM channels are needed and your application is stepper or DC brushed. Choose the DSPIC33FJ128MC802T-E/SO when the deployment requires extended temperature (-40C to +125C) such as under-hood automotive, outdoor PV, or industrial cabinet fan drives. Choose the DSPIC33FJ128GP802T-I/SO when no motor-control PWM is needed but ECAN and 40 MIPS DSP math are still required (UPS, telecom rectifier, digital SMPS control). All five alternatives share the same 28-SOIC wide-body footprint, enabling PCB layout reuse across product variants.

Comparison with Alternatives

Parameter This Product DSPIC33FJ128MC802-I/SO DSPIC33FJ128MC202-I/SO DSPIC33FJ128GP802T-I/SO DSPIC33FJ128MC802T-E/SO DSPIC33FJ128MC802T-I/MM
Brand Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology
Package 28-SOIC wide-body 28-SOIC wide-body - same 28-SOIC wide-body - same 28-SOIC wide-body - same 28-SOIC wide-body - same 28-SOIC wide-body - same
CPU Speed 40 MIPS (50 MHz) 40 MIPS 40 MIPS 40 MIPS 40 MIPS 40 MIPS
Flash Memory 128 KB 128 KB 128 KB 128 KB 128 KB 128 KB
SRAM 16 KB 16 KB 16 KB 16 KB 16 KB 16 KB
Motor-Control PWM Channels 6 6 4 (-33%) 0 (GP variant) 6 6
Temperature Grade Industrial -40C to +85C Industrial -40C to +85C Industrial -40C to +85C Industrial -40C to +85C Extended -40C to +125C Industrial -40C to +85C
ECAN Yes Yes Yes Yes Yes Yes

Key Differentiators

  • Industry-leading motor-control PWM with 1.04 ns resolution (vs DSPIC33FJ128GP802T-I/SO)
  • Industrial temperature grade variant with field-proven supply (vs DSPIC33FJ128MC802T-E/SO)
  • Hardware DSP engine with 40 MIPS single-cycle MAC (vs DSPIC33FJ128MC202-I/SO)

Design Notes

Estimated: place a 10 uF ceramic bulk plus 0.1 uF decoupling capacitor pair within 3 mm of each VDD pin and a separate pair on each AVDD pin. The DSPIC33FJ128MC802T-I/SO ADC accuracy degrades above 1 LSB if analog and digital ground returns are not separated by a star-ground topology near the IC. Keep AVDD tracking matched to VDD within 0.05 V to avoid ADC reference offset.

Estimated: the 28-SOIC wide-body thermal resistance theta_JA is approximately 70 C/W on a 4-layer JEDEC test board. At 40 MIPS core clock plus 6 active PWM outputs, typical core power is 30-50 mW, resulting in 2-3 C rise above ambient, well within the industrial -40C to +85C envelope. No heatsink is required for the SOIC-28 wide-body footprint under normal operating conditions, but airflow above 50 C/W sustained load still requires derating.

Route the PWM1H/L, PWM2H/L, and PWM3H/L traces as short, matched-length pairs to the gate driver inputs to preserve switching symmetry and avoid shoot-through. Keep ECAN CANH/CANL traces as a 100 ohm differential pair with a common-mode choke near the transceiver, and provide a guard ring around the crystal oscillator to suppress coupling into the ADC inputs. The 28-SOIC wide-body footprint provides adequate copper pour for the heat dissipation budget of the part.

Common pitfalls when using DSPIC33FJ128MC802T-I/SO include: (1) forgetting to configure the JTAG pins as GPIO after debug, which leaves them in a high-impedance state; (2) using PPS without enabling the corresponding peripheral clock, which silently disables remapped functions; (3) failing to clear the PWM fault latch after a hardware trip, which holds the PWM outputs low indefinitely; (4) ignoring the 1.04 ns PWM resolution timing when calculating dead-time at high switching frequencies above 1 MHz.

Compliance Information

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
Lead Free
Yes
Halogen Free
Yes
Conflict Minerals
Compliant

RoHS and REACH compliance per Microchip product environmental compliance page. MSL-1 moisture sensitivity rating. Industrial temperature grade I/-40C to +85C; choose E-suffix variant for extended -40C to +125C. AEC-Q100 not qualified - this part is not automotive grade.

Data verified on: 2026-09-26 — data verified and curated by XAIPART's component engineering team

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Related Components & Terms

Microchip Technology DSPIC33FJ128MC802T-I/SO DSPIC33FJ128MC802 DSPIC33FJ128MC202 DSPIC33FJ128GP802 dsPIC33F PIC24HJ DSC Digital Signal Controller DSP modified Harvard architecture 28-SOIC wide-body motor-control PWM ECAN DMA field-oriented control FOC sensorless PMSM PMSM BLDC RoHS MSL-1 ADC analog comparator JEDEC
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