ESP32-C5 - Dual-Band Wi-Fi 6 RISC-V SoC | Espressif Systems
MPN: ESP32-C5 β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $2.95 | $2.95 |
| 10 | $2.66 | $26.60 |
| 100 | $2.36 | $236.00 |
| 500 | $2.1 | $1,050.00 |
| 1,000 | $1.86 | $1,860.00 |
ESP32-C5 Overview
A system-on-chip (SoC) integrates a processor core, memory, wireless baseband, RF transceiver and peripherals onto a single die, sitting at the top of the embedded microcontroller hierarchy: SoC -> wireless MCU -> microcontroller -> embedded processor. By integrating Wi-Fi, Bluetooth LE and IEEE 802.15.4 MAC/baseband with time-division coexistence, the ESP32-C5 replaces multi-chip wireless solutions and simplifies Matter and Thread product designs.
Key features include dual-band 1T1R Wi-Fi 6 operation over 2412-2484 MHz and 5180-5885 MHz, uplink and downlink OFDMA for congested networks, 20 MHz-only non-AP mode per 802.11ax, and native Thread 1.4 plus Zigbee 3.0 for smart-home ecosystems. The dual-core RISC-V architecture separates wireless protocol stacks (LP core) from user applications (HP core), improving real-time responsiveness and power efficiency.
The RF module and baseband implement Wi-Fi, Bluetooth LE and 802.15.4 with a coexistence mechanism, allowing a single PCB antenna path to serve concurrent protocol stacks. Flash can be supplied at 1.8 V (1.65-2.00 V) or 3.3 V (2.7-3.6 V) per the datasheet electrical characteristics.
Typical applications include Matter/Thread smart-home devices, dual-band Wi-Fi gateways, industrial IoT sensors that benefit from the less-congested 5 GHz band, and wireless accessories requiring BLE 5 plus 802.15.4.
For design, follow the Espressif ESP32-C5 Hardware Design Guidelines, which detail RF matching, power decoupling and GPIO matrix routing; flash supply voltage selection must match the chosen external flash part.
This page synthesizes verified datasheet parameters, same-family drop-in variants, practical design notes, and FAQ content not found together on the manufacturer datasheet.
Drop-in alternatives for ESP32-C5 β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
ESP32-C5HR4
β Drop-In β οΈ εζ°εΎ ιͺθ―π Reference alternative (not in catalog)
ESP32-C5HR2
β Drop-In β οΈ εζ°εΎ ιͺθ―π Reference alternative (not in catalog)
ESP32-C5 Maximum Ratings & Electrical Characteristics
| Product Type | Dual-band Wi-Fi 6 / BLE / 802.15.4 SoC |
| HP CPU Core | 32-bit RISC-V high-performance processor |
| LP CPU Core | 32-bit RISC-V low-power processor |
| Wi-Fi Standard | IEEE 802.11ax (Wi-Fi 6), 2.4 and 5 GHz, 1T1R |
| Wi-Fi Frequency Range | 2412 MHz to 2484 MHz, 5180 MHz to 5885 MHz |
| OFDMA | Uplink and downlink OFDMA, 20 MHz-only non-AP mode |
| Bluetooth | Bluetooth 5 (LE) |
| 802.15.4 Protocols | Zigbee 3.0, Thread 1.4 |
| Protocol Coexistence | Time-division coexistence of Wi-Fi, Bluetooth LE and 802.15.4 |
| Flash Supply Voltage (1.8 V) | 1.65 V to 2.00 V (typ 1.80 V) |
| Flash Supply Voltage (3.3 V) | 2.7 V to 3.6 V (typ 3.3 V) |
| Package | 48-VFQFN Exposed Pad |
| Mounting Type | Surface Mount |
ESP32-C5 48-vfqfn exposed pad Pin Configuration Guide
Pin configuration for ESP32-C5 (48-vfqfn exposed pad package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for ESP32-C5.
Refer to the datasheet for full pin configuration.
Typical Applications
ESP32-C5 is suitable for 6 applications: Matter-over-Thread Smart Home Devices, Dual-Band Wi-Fi 6 IoT Gateways, Smart Home Sensors and Actuators, Industrial IoT and Factory Automation Nodes, Wi-Fi + BLE Combination Accessories, Thread Border Router Development.
Matter-over-Thread Smart Home Devices
The ESP32-C5 natively integrates an IEEE 802.15.4 radio running Thread 1.4 and Zigbee 3.0 alongside Bluetooth LE 5 for commissioning, making it a single-chip Matter end-device solution. Thread mesh networking provides self-healing, low-latency control channels, while BLE handles the Matter commissioning flow without a second chip. The dual RISC-V architecture lets the LP core service Thread stack timing while the HP core runs application logic. Developers build on ESP-IDF v5.5+, which ships certified Thread and Matter stacks, shortening time-to-certification for smart-home products.
Recommended
Dual-Band Wi-Fi 6 IoT Gateways
For gateways bridging Thread/Zigbee sensor meshes to IP networks, the ESP32-C5's 5 GHz Wi-Fi 6 backhaul avoids the congested 2.4 GHz band where the sensor mesh itself operates, dramatically reducing self-interference. Uplink and downlink OFDMA sustains efficient packet scheduling when many nodes contend, per the 802.11ax compliance noted in the datasheet. The HP RISC-V core handles bridging and application code while the LP core keeps 802.15.4 protocol timing. Coverage across 2412-2484 MHz and 5180-5885 MHz supports global deployments with a single SKU.
Recommended
Smart Home Sensors and Actuators
Battery-friendly smart sensors (door, motion, environment) benefit from the ESP32-C5's ultra-low-power architecture: the LP 32-bit RISC-V processor manages sleep/wake and sensor polling while the HP core powers up only for Wi-Fi/BLE transmissions. Zigbee 3.0 or Thread 1.4 operation over 802.15.4 provides the low-overhead mesh connectivity these products need, and Wi-Fi 6 is available for data-heavy events. This protocol flexibility lets one hardware platform serve multiple product lines - a key cost lever for consumer IoT manufacturers scaling across ecosystems.
Recommended
Industrial IoT and Factory Automation Nodes
In factories, the 2.4 GHz band is saturated by legacy Wi-Fi, Bluetooth and proprietary radios; the ESP32-C5's 5 GHz Wi-Fi 6 operation (5180-5885 MHz) delivers cleaner spectrum and more stable latency for industrial monitoring nodes. OFDMA scheduling maintains determinism under load, and the 802.15.4 radio can implement Thread-based device meshes for retrofit sensor deployments. The HP RISC-V core provides headroom for local protocol conversion, Modbus-to-IP bridging, or edge filtering, while hardware security features protect OTA firmware updates in the field.
Recommended
Wi-Fi + BLE Combination Accessories
Consumer accessories such as smart displays, scales, and appliance controllers need BLE for phone-based setup plus Wi-Fi for cloud connectivity - historically two chips or a complex combo part. The ESP32-C5 integrates Bluetooth 5 LE and dual-band Wi-Fi 6 with time-division coexistence, per the ESP32-C5 Series datasheet, handling both stacks on one SoC. The 5 GHz band option lets designers avoid the interference that degrades BLE coexistence in dense homes, and ESP-IDF provides mature dual-stack pairing flows, cutting firmware development risk for accessory makers.
Recommended
Thread Border Router Development
A Thread border router needs both an 802.15.4 radio and an IP-backhaul interface; the ESP32-C5 provides both in one chip, with Thread 1.4 on the 802.15.4 radio and Wi-Fi 6 (2.4/5 GHz) as backhaul. The time-division coexistence mechanism arbitrates airtime between the two stacks, which is adequate for typical border-router traffic profiles where Thread control packets are small and infrequent relative to Wi-Fi capacity. Reference designs on the ESP32-C5-DevKitC-1 allow full OpenThread border-router firmware validation before production PCB spin.
Recommended
Recommended Products Summary
Engineering reference data for ESP32-C5 β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | ESP32-C5HR4 | ESP32-C5HR2 | ESP32-C6 (functional) |
|---|---|---|---|---|
| Package | 48-VFQFN Exposed Pad | 48-VFQFN Exposed Pad - same | 48-VFQFN Exposed Pad - same | QFN - different footprint (functional comparison only) |
| Brand | Espressif Systems | Espressif Systems | Espressif Systems | Espressif Systems |
| Wi-Fi Bands | 2.4 GHz + 5 GHz dual-band | 2.4 GHz + 5 GHz dual-band | 2.4 GHz + 5 GHz dual-band | 2.4 GHz only |
| Wi-Fi Standard | 802.11ax (Wi-Fi 6), 1T1R | 802.11ax (Wi-Fi 6), 1T1R | 802.11ax (Wi-Fi 6), 1T1R | 802.11ax (Wi-Fi 6), 1T1R |
| Bluetooth | Bluetooth 5 (LE) | Bluetooth 5 (LE) | Bluetooth 5 (LE) | Bluetooth 5 (LE) |
| 802.15.4 (Zigbee/Thread) | Zigbee 3.0, Thread 1.4 | Zigbee 3.0, Thread 1.4 | Zigbee 3.0, Thread 1.4 | Zigbee 3.0, Thread 1.3 |
| CPU Architecture | HP + LP 32-bit RISC-V dual core | HP + LP 32-bit RISC-V dual core | HP + LP 32-bit RISC-V dual core | HP + LP 32-bit RISC-V dual core |
Key Differentiators
- Only Espressif C-series SoC with dual-band 5 GHz Wi-Fi 6 (vs ESP32-C6 (functional comparison))
- First RISC-V MCU combining dual-band Wi-Fi 6 with 802.15.4 (vs nRF52840 (functional comparison))
- Flash/RAM configuration flexibility on the same footprint (vs ESP32-C5HR4 / ESP32-C5HR2)
Design Notes
Follow the Espressif ESP32-C5 Hardware Design Guidelines for RF section layout: keep the 48-VFQFN exposed pad as the main ground return with a full array of via stitching to the ground plane, place decoupling capacitors for each supply pin within 1-2 mm of the pin, and isolate the RF matching network from switching circuitry. The guidelines also cover GPIO matrix vs IO MUX pin assignment - default IO MUX functions give the best timing for high-speed peripherals.
Match the external flash rail to the datasheet ranges: 1.65-2.00 V for 1.8 V flash or 2.7-3.6 V for 3.3 V flash. Wi-Fi 6 TX bursts create significant peak current demand, so size the power supply and bulk capacitance for the peak figure in the datasheet power consumption table rather than average current; a shared LDO for RF and flash should have adequate load transient response to avoid brownouts during OFDMA uplink bursts.
Do not assume concurrent radio transmission: Wi-Fi, Bluetooth LE and 802.15.4 share the RF front-end via time-division coexistence, so dense simultaneous BLE advertising plus Wi-Fi throughput will share airtime. Budget protocol timing accordingly in gateway designs. Also verify flash/PSRAM density selection against your firmware footprint before fixing the part number - the C5 family ships with multiple flash/RAM configurations in the same 48-VFQFN footprint.
Compliance Information
Compliance status not stated in the provided Verified Web Data. Espressif publishes regulatory certificates via its product selector page; verify RoHS/REACH status on the official Espressif product page before production.
