FTSH-105-01-L-DV-K-A-TR - 10-Pin SMT Micro Header Strip | Samtec
MPN: FTSH-105-01-L-DV-K-A-TR ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $2.27 | $2.27 |
| 10 | $1.96 | $19.60 |
| 100 | $1.58 | $158.00 |
| 500 | $1.32 | $660.00 |
| 1,000 | $1.12 | $1,120.00 |
FTSH-105-01-L-DV-K-A-TR Overview
A board-to-board header strip is a surface-mount electromechanical interconnect that provides a detachable, multi-position link between a daughter card and a host PCB. It sits within the broader family of pin headers, which are organized into unshrouded (breakaway) and shrouded (shrouded/boxed) variants. FTSH parts are unshrouded and rely on a keying notch rather than a plastic shroud to prevent mis-mating. Within Samtec's catalog the FTSH series sits above lower-cost breakaway headers and below fully shrouded, locking Tiger Eye or QTE/QSE interfaces, placing it in the mid-tier for moderate reliability and signal integrity.
Key features of the FTSH-105-01-L-DV-K-A-TR include a liquid crystal polymer (LCP) insulator rated for reflow soldering up to 260 C in accordance with JEDEC J-STD-020, phosphor-bronze contact springs for stable contact force, and the '-K-A' polarization key that orients mating halves relative to pin A1. Operating temperature spans -55 C to +125 C. The TR suffix denotes Tape and Reel packaging compatible with automated pick-and-place assembly. The 'e3' termination finish designation refers to a tin (Sn) finish with a nickel underplate; this variant retains a lead-containing contact plating consistent with the legacy '-L' coding.
Typical applications include FPGA and MCU debug/JTAG headers, signal break-out boards, mezzanine-to-board interconnects for industrial controllers, test and programming fixtures, and routing for differential low-speed signal buses such as SPI, I2C, and GPIO banks. Designers select this footprint when board real estate is constrained and a vertical, shrouded-or-keyed interface is not required. When comparing drop-in alternatives note that all variants in the FTSH-105-01 family share the same 1.27 mm pitch, 10-pin count, and insulator body - only the plating (L), keying position (K-A), and packaging (TR or tube) change.
Design considerations include ensuring pad geometry matches the recommended land pattern in the Samtec FTSH datasheet, providing adequate keep-out for the post tails to avoid solder wicking, and confirming that mating socket housings such as CLP or FLE series are specified for the same polar-key orientation. This page synthesizes distributor pricing and drop-in alternatives from DigiKey, Mouser, and LCSC that are not consolidated on the manufacturer datasheet.
Drop-in alternatives for FTSH-105-01-L-DV-K-A-TR — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
FTSH-105-01-L-DV-K-A
✅ Drop-In📋 Reference alternative (not in catalog)
FTSH-105-01-L-DV-K-A-P-TR
✅ Drop-In📋 Reference alternative (not in catalog)
FTSH-105-01-L-DV-K-TR
✅ Drop-In📋 Reference alternative (not in catalog)
FTSH-105-01-L-DV-K-A-P-FR
✅ Drop-In📋 Reference alternative (not in catalog)
FTSH-105-01-STL-DV-K-P-TR
✅ Drop-In📋 Reference alternative (not in catalog)
FTSH-105-01-L-DV-K-A-TR Specifications
| Series | FTSH |
| Number of Positions | 10 |
| Number of Rows | 2 |
| Pitch | 0.050 in (1.27 mm) |
| Mounting Type | Surface Mount |
| Orientation | Vertical |
| Connector Type | Header, unshrouded, breakable (cuttable) |
| Contact Material | Phosphor bronze |
| Contact Finish (Mating) | 10 uin (0.25 um) Gold |
| Contact Finish (Termination) | Tin (e3) |
| Post Length (Overall) | 0.120 in (3.05 mm) |
| Insulator Material | Liquid Crystal Polymer (LCP) |
| Operating Temperature | -55 C to +125 C |
| Keying Feature | Polarization notch on side A |
| Packaging | Tape and Reel (TR) |
FTSH-105-01-L-DV-K-A-TR standard Pin Configuration Guide
Pin configuration for FTSH-105-01-L-DV-K-A-TR (standard package). Pin numbering, functions, and connection diagrams are defined in the manufacturer datasheet. Refer to it for the exact footprint and soldering guidelines.
No detailed pinout data available for FTSH-105-01-L-DV-K-A-TR.
Refer to the datasheet for full pin configuration.
Typical Applications
FTSH-105-01-L-DV-K-A-TR is suitable for 6 applications: FPGA / MCU Debug and Programming Header, Industrial Breakout Board Interconnect, Modular Sensor Daughter Card Interface, Test & Programming Fixture, Mezzanine Signal Routing Card, LED Lighting Module Interconnect.
FPGA / MCU Debug and Programming Header
The FTSH-105-01-L-DV-K-A-TR serves as a robust vertical programming/debug port for FPGA and MCU boards where JTAG, SWD, or UART lines must be brought to a single 1.27 mm keyed connector. Its 10-position 2x5 layout matches the ARM Cortex 10-pin JTAG pinout convention, while the polarization key prevents the cable from being inserted backwards on first-power boards. Designers appreciate the 10 uin gold plating for test-cycle durability and the 0.120 in post length for low-insertion-force mating cycles over a product's life.
Recommended
Industrial Breakout Board Interconnect
On industrial signal-breakout boards the FTSH-105-01-L-DV-K-A-TR acts as the stacked daughtercard-to-mainboard interface, carrying SPI, I2C, GPIO, and analog signals between isolated board sections. Its 1.27 mm pitch allows dense routing under 5 mm board-to-board clearance, while the LCP insulator survives wave and reflow profiles used in industrial assembly. The vertical orientation suits placements where the daughter board sits above I/O connectors, and the keyed alignment avoids field-replacement wiring errors.
Recommended
Modular Sensor Daughter Card Interface
Wearable and IoT sensor stacks use the FTSH-105-01-L-DV-K-A-TR as a low-profile stacking interface to a sensor daughter card carrying accelerometers, IMUs, or environmental sensors. The header's 3.05 mm post length enables 5 mm or larger board-to-board separations necessary for housing sensors, while the keyed polarization prevents assembly misalignment during automated pick-and-place runs. Gold mating surface ensures stable contact through repeated service cycles in fielded wearables.
Recommended
Test & Programming Fixture
In-circuit test (ICT) and bed-of-nails fixtures rely on the FTSH-105-01-L-DV-K-A-TR's high mating-cycle endurance and exact 1.27 mm grid to align pogo-pin probes. The keyed orientation guarantees fixture-to-DUT correspondence across many test cycles without retooling, while the LCP body tolerates thermal cycling from -55 C to +125 C during burn-in. Tape-and-Reel packaging supports the high-volume fixture builds used by contract manufacturers.
Recommended
Mezzanine Signal Routing Card
The FTSH-105-01-L-DV-K-A-TR provides the vertical signal link between a baseboard and a mezzanine module carrying high-speed serial links, FPGAs, or ADC channels. Its 1.27 mm pitch matches Samtec's 0.050in family stack height of approximately 5-7 mm, fitting standard mezzanine card cage dimensions without mechanical spacers. Phosphor-bronze contacts maintain low contact resistance over the long-life requirements of telecom and defense mezzanine modules.
Recommended
LED Lighting Module Interconnect
LED lighting modules and pixel arrays use the FTSH-105-01-L-DV-K-A-TR as a low-profile keyed interconnect for segment-to-segment data and power routing in mini-LED backlights and architectural fixtures. The 1.27 mm pitch and 10-position footprint accommodate DMX, SPI, and ground-reference signals on a single connector. Tape-and-reel packaging streamlines SMD placement on lighting PCBs where connectors sit between LED rows.
Recommended
Recommended Products Summary
Engineering reference data for FTSH-105-01-L-DV-K-A-TR — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | FTSH-105-01-L-DV-K-A | FTSH-105-01-L-DV-K-A-P-TR | FTSH-105-01-L-DV-K-TR | FTSH-105-01-L-DV-K-A-P-FR | FTSH-105-01-STL-DV-K-P-TR |
|---|---|---|---|---|---|---|
| Brand | Samtec | Samtec | Samtec | Samtec | Samtec | Samtec |
| Package | SMT Vertical 10-pin 0.050in (1.27mm) | SMT Vertical 10-pin 0.050in | SMT Vertical 10-pin 0.050in | SMT Vertical 10-pin 0.050in | SMT Vertical 10-pin 0.050in | SMT Vertical 10-pin 0.050in |
| Number of Positions | 10 (2 rows x 5) | 10 (2x5) | 10 (2x5) | 10 (2x5) | 10 (2x5) | 10 (2x5) |
| Keying / Polarization | Key A | Key A | Key A | No Key | Key A | Key K (different side) |
| Mating Plating | 10 uin Gold | 10 uin Gold | Gold (P grade) | 10 uin Gold | Gold (P grade) | Selective Tin-Lead (STL) |
| Termination Plating | Tin (e3) | Tin (e3) | Tin (e3) | Tin (e3) | Tin (e3) | Tin-Lead (e0 class) |
| Post Length | 0.120 in (3.05 mm) | 0.120 in (3.05 mm) | 0.120 in (3.05 mm) | 0.120 in (3.05 mm) | 0.120 in (3.05 mm) | 0.120 in (3.05 mm) |
| Packaging | Tape & Reel (TR) | Tube | Tape & Reel (TR) | Tape & Reel (TR) | Tape & Reel (FR alignment) | Tape & Reel (TR) |
Key Differentiators
- Polarization key on side A prevents mis-mating (vs FTSH-105-01-L-DV-K-TR)
- Tape & Reel packaging for automated assembly (vs FTSH-105-01-L-DV-K-A)
- Legacy lead-containing 'L' plating for mission-critical use (vs FTSH-105-01-STL-DV-K-P-TR)
Design Notes
Land pattern: use the recommended 1.27 mm-pitch SMT land geometry from Samtec FTSH datasheet, with two SMT pads per pin plus a perimeter keep-out of 0.25 mm around the post tails to prevent solder bridging. Reels are supplied with cover tape that must be removed after reflow; avoid screening solder paste beyond the pad outline as excess paste can wick up the post.
Place the FTSH near the board edge when it serves as a programming port to keep ribbon-cable routing short and to allow probe access during ICT. Maintain at least 1.27 mm clearance between the header body and adjacent tall components (>5 mm) so that polarization key on side A remains mappable. For multi-connector layouts, mirror part orientation to ensure all Key-A notches align in the same direction for technician consistency.
The 1.27 mm FTSH is unshrouded and not designed for controlled-impedance high-speed lanes - the maximum practical single-ended data rate is approximately 100 Mbps over short (<50 mm) traces. For LVDS, USB 2.0 differential pairs, or faster serial links route signals on a connector-impedance-matched interface (Samtec QSE/QTE or Razor Beam) rather than the FTSH series.
Do not mix Key-A, Key-B, and Key-K variants on the same PCB - although pins match, polarization mis-match prevents correct orientation detection during assembly. Specified 10 uin gold plating is suitable for moderate mating cycles; for >500-cycle applications consider Samtec Tiger Eye or TFM series. Confirm the e3 termination vs e0 designation per current RoHS requirements, since 'L' indicates legacy lead-containing plating on the contact side.
Compliance Information
The 'L' plating code indicates legacy tin-lead contacts that are RoHS-restricted; this part may qualify for an exemption under EU Commission Decision 2002/525/EC Annex II per TTI's compliance documentation, but full RoHS/REACH status was not verified in the provided data. AEC-Q100 is not applicable to a passive connector.