W25Q128FWPIG - 128Mbit 1.8V Serial NOR Flash | Winbond
MPN: W25Q128FWPIG ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $1.85 | $1.85 |
| 10 | $1.62 | $16.20 |
| 100 | $1.34 | $134.00 |
| 500 | $1.08 | $540.00 |
| 1,000 | $0.92 | $920.00 |
W25Q128FWPIG Overview
A Serial NOR Flash is a non-volatile memory that connects to a host processor via a synchronous serial peripheral interface (SPI) rather than a wide parallel bus. Within the storage hierarchy, it sits above battery-backed SRAM and below high-density NAND flash: random-access latency is on the order of tens of nanoseconds, page-program time is measured in milliseconds, and the endurance is typically 100k erase cycles per sector. The 25Q series extends this with dual- and quad-I/O variants that multiply throughput by reusing existing pins.
Key features include 128 Mbit density organised as 16 M x 8 bits, 4 KB uniform sectors combined into 32 KB and 64 KB blocks for flexible erase granularity, page-program of 256 bytes, and 100k erase/program endurance cycles with >20-year data retention. The device supports 1.7 V to 1.95 V single-supply operation, hardware and software write protection, a 64-bit unique ID, and three JEDEC-standard device identification bytes (9Fh) plus manufacturer/device IDs (Winbond EFh). Quad Enable (QE) bit enables continuous Quad SPI throughput.
Internally, the W25Q128FW uses a NOR-array cell technology optimised for low-power read (typically <10 mA active, <1 uA standby), with on-chip SRAM buffers for page program and an integrated charge pump for program/erase. The state machine implements the full JEDEC 0x9F plus the Winbond-specific 0xAB (release power-down / read electronic ID) command set, and the standard 0x03 (read), 0x0B (fast read), 0x02 (page program), 0x20 (sector erase), 0xD8 (block erase), and 0xC7 (chip erase) commands.
Typical applications include boot code and firmware storage in IoT edge nodes, asset-tracking and sensor data logging, wearable and portable consumer devices, OTA-updatable embedded firmware, automotive infotainment and instrument-cluster secondary bootloaders, point-of-sale terminals, and low-power wireless sensor modules. The 1.8 V supply matches directly to lithium-ion battery rails without an additional LDO.
Design tip: when migrating between the W25Q128FW (1.8 V) and the 2.7-3.6 V W25Q128JV family, the JEDEC manufacturer ID (EFh) and the QE-bit location remain compatible, but the supply-voltage range does not - confirm the upstream regulator before substituting across voltage classes.
This page synthesises real-time distributor pricing, pin-compatible drop-in alternatives, and design considerations not collected in a single place in the Winbond datasheet.
Drop-in alternatives for W25Q128FWPIG — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
W25Q128JWFIQ
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
W25Q128FVSIG
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
W25Q128FWPIM
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
GD25Q128EWSIQ
✅ Drop-In📋 Reference alternative (not in catalog)
EN25QH128
✅ Drop-In📋 Reference alternative (not in catalog)
MX25L12835FM2I-10G
✅ Drop-In📋 Reference alternative (not in catalog)
W25Q128FWPIG Maximum Ratings & Electrical Characteristics
| Memory Type | Serial NOR Flash |
| Memory Size | 128 Mbit (16 MB) |
| Memory Organization | 16 M x 8 bits |
| Interface | SPI, Dual SPI, Quad SPI, QPI |
| Maximum Clock Frequency | 104 MHz |
| Page Size | 256 bytes |
| Sector Size | 4 KB uniform |
| Block Size | 32 KB and 64 KB |
| Supply Voltage | 1.7 V to 1.95 V (1.8 V nominal) |
| Active Read Current | <10 mA typical (Quad read, 80 MHz) |
| Standby Current | <1 uA typical |
| Endurance | 100,000 erase/program cycles per sector |
| Data Retention | >20 years |
| Operating Temperature | -40C to +85C (industrial grade) |
| Package | 8-WSON EP (6x5 mm) with exposed pad |
| Mounting Type | Surface Mount |
| MSL Level | 3 (per JEDEC J-STD-020) |
| JEDEC Manufacturer ID | EFh (Winbond) |
W25Q128FWPIG Pin Configuration
| Pin 1 | /CS — Chip Select (active low). Enables device when low; ignored when high. |
| Pin 2 | DO (IO1) — Serial Data Out / IO1 in Quad SPI mode. |
| Pin 3 | /WP (IO2) — Write Protect (active low) / IO2 in Quad SPI mode. |
| Pin 4 | GND — Common ground reference. |
| Pin 5 | DI (IO0) — Serial Data In / IO0 in Quad SPI mode. |
| Pin 6 | CLK — Serial Clock input, up to 104 MHz. |
| Pin 7 | /HOLD (IO3) — Hold (active low) / IO3 in Quad SPI mode. |
| Pin 8 | VCC — 1.8 V power supply (1.7 V to 1.95 V). |
Typical Applications
W25Q128FWPIG is suitable for 6 applications: IoT Edge Node Bootloader & Firmware Storage, Wearable & Portable Consumer Devices, Wireless Sensor Module Data Logging, Automotive Infotainment Secondary Boot, Point-of-Sale Terminal Firmware, Industrial HMI & Data Logger.
IoT Edge Node Bootloader & Firmware Storage
The W25Q128FWPIG is a natural fit for IoT edge-node bootloaders and primary firmware images because its 16 MB capacity comfortably holds dual-bank A/B OTA images plus a recovery golden copy, and its 104 MHz Quad SPI read delivers >50 MB/s so the host MCU can execute-in-place (XIP) directly from the flash without first copying to RAM. The 1.8 V single supply connects directly to a Li-ion or Li-Po battery rail without an intermediate LDO, eliminating one part from the BOM. The device's 100k erase-cycle endurance per sector and 20-year retention comfortably outlast typical 5-7 year IoT deployment lifetimes, while the <1 uA standby current preserves battery life during sleep. Pair with a host MCU such as STM32L4 or ESP32-S3 in dual-bank OTA schemes.
Recommended
Wearable & Portable Consumer Devices
In wearables such as fitness bands, smart watches, and BLE earbuds, the W25Q128FWPIG provides 16 MB of code and asset storage on a 1.8 V rail that matches the Li-ion battery directly, saving an LDO and shrinking BOM cost. Its Quad SPI throughput allows fast boot of graphics assets into a small TFT/OLED display controller, while its <1 uA standby draw has negligible impact on sleep current budgets. The 8-WSON 6x5 mm exposed-pad package occupies only 30 mm^2 of PCB, fitting inside the tight mechanical envelope of wearables. Designers typically pair it with a Cortex-M4 or RISC-V Bluetooth SoC running a small RTOS, with the flash holding firmware plus fonts and waveform data.
Recommended
Wireless Sensor Module Data Logging
Battery-powered wireless sensor modules - LoRa nodes, BLE beacons, NB-IoT trackers - need periodic sensor-data buffering when the radio is duty-cycled off. The W25Q128FWPIG offers 16 MB of non-volatile storage with 4 KB sectors that can be erased individually, simplifying wear-leveling across millions of small telemetry writes. Its 1.8 V supply matches the LiSOCl2 or Li-ion primary cells typical in these modules without a boost converter, and the 100k erase endurance per sector is sufficient when writes are spread across the full array. Active read current below 10 mA even at Quad SPI rates keeps peak drain within the budget of a small solar-harvested supply.
Recommended
Automotive Infotainment Secondary Boot
In automotive infotainment and digital instrument clusters, the W25Q128FWPIG serves as a secondary boot stage where the main SoC loads initial configuration and graphics assets before bringing up the application processor. The wide operating temperature of -40C to +85C covers cabin and boot-bay environments, and the 16 MB capacity accommodates bootloaders, splash screens, and language assets. When AEC-Q100 qualification is required, the FW family's automotive-grade siblings (VSIG / VSNIG suffixes) in the same package provide drop-in compatibility. Designers typically pair the flash with a Cortex-A or Cortex-R host and a separate secure-element for key storage.
Recommended
Point-of-Sale Terminal Firmware
POS terminals and EFT-Pin-pad devices carry transaction firmware, EMV kernel libraries, and cryptographic certificates that must be updatable in the field under payment industry regulation. The W25Q128FWPIG provides 16 MB for dual-bank firmware with a recovery golden image, hardware write-protect pins (/WP and /HOLD) for tamper response, and a 64-bit unique ID per chip that supports device attestation. The 1.8 V single supply aligns with the system LDO rail, and the JEDEC-standard 0x9F / 0xAB / 0x03 command set is well-supported by secure-boot ROMs in mainstream POS SoCs.
Recommended
Industrial HMI & Data Logger
Industrial HMIs, panel meters, and data loggers use the W25Q128FWPIG to store boot images, multilingual UI strings, and rolling event logs with non-volatile retention through power cycles. Its 4 KB uniform sector size maps cleanly onto record-oriented logging where each event is appended to the next available sector. The exposed-pad WSON package supports industrial -40C to +85C environments, and the Quad SPI interface allows fast screen refresh from on-chip asset storage. The 1.8 V supply aligns with energy-harvesting or battery-backed industrial sensor designs.
Recommended
Recommended Products Summary
Engineering reference data for W25Q128FWPIG — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | W25Q128JWFIQ | W25Q128FVSIG | GD25Q128EWSIQ | EN25QH128 | MX25L12835FM2I-10G |
|---|---|---|---|---|---|---|
| Brand | Winbond | Winbond | Winbond | GigaDevice | Eon Silicon Solution | Macronix |
| Package | 8-WSON EP (6x5 mm) | 8-WSON EP (6x5 mm) - same | 8-WSON EP (6x5 mm) - same | 8-WSON EP (6x5 mm) - same | 8-WSON EP (6x5 mm) - same | 8-WSON EP (6x5 mm) - same |
| Memory Density | 128 Mbit (16 MB) | 128 Mbit (16 MB) | 128 Mbit (16 MB) | 128 Mbit (16 MB) | 128 Mbit (16 MB) | 128 Mbit (16 MB) |
| Supply Voltage | 1.7 V to 1.95 V | 1.7 V to 1.95 V | 1.7 V to 1.95 V | 1.65 V to 2.0 V | 2.7 V to 3.6 V | 2.7 V to 3.6 V |
| Maximum Clock Frequency | 104 MHz | 133 MHz (JW gen) | 104 MHz | 104 MHz | 104 MHz | 104 MHz |
| JEDEC Manufacturer ID | EFh (Winbond) | EFh (Winbond) | EFh (Winbond) | C8h (GigaDevice) | 1Ch (Eon) | C2h (Macronix) |
| Sector Size | 4 KB uniform | 4 KB uniform | 4 KB uniform | 4 KB uniform | 4 KB uniform | 4 KB uniform |
| Endurance | 100k erase/program cycles | 100k erase/program cycles | 100k erase/program cycles (AEC-Q100) | 100k erase/program cycles | 100k erase/program cycles | 100k erase/program cycles |
| Operating Temperature | -40C to +85C | -40C to +85C | -40C to +105C (AEC-Q100) | -40C to +85C | -40C to +85C | -40C to +85C |
Key Differentiators
- 1.8 V single-supply operation without LDO (vs GD25Q128EWSIQ)
- Winbond EFh JEDEC ID with mature Quad SPI command set (vs GD25Q128EWSIQ)
- Industrial -40C to +85C temperature range (vs W25Q128FVSIG)
- Quad SPI throughput of 104 MHz (vs MX25L12835FM2I-10G)
Design Notes
Layout the W25Q128FWPIG with the exposed pad soldered directly to a continuous ground copper pour that extends at least 4-6 vias to inner ground planes. The exposed pad carries the primary thermal path and ground return for the SPI I/O. Keep traces to /CS, CLK, DO, DI short (<25 mm) and length-matched to within 5 mm if running above 80 MHz to avoid skew-induced data errors. Place a 100 nF decoupling capacitor within 3 mm of pin 8 (VCC) and a 10 uF bulk cap nearby on the same VCC plane.
When migrating from the 3.3 V W25Q128JV family to the 1.8 V W25Q128FW family, verify the host MCU's Quad SPI peripheral VCCQ rail matches the flash's VCC. Direct connection of a 3.3 V W25Q128JV signal to a 1.8 V W25Q128FW VCC will exceed absolute maximum ratings and latch-up the flash. If your SoC lacks a separate VCCQ domain, add a small LDO or level shifter. The JEDEC ID (EFh) and QE-bit position are identical across FW and JV, so firmware does not need rewriting once voltage compatibility is confirmed.
For Quad SPI operation above 80 MHz, series-terminate CLK with a 22-33 ohm resistor placed near the host driver to dampen reflections on the long PCB trace. Keep the Quad I/O lines (IO0-IO3) impedance-controlled to 50 ohms with reference to the ground pour. Route the SPI signals on the top layer over a continuous ground plane and avoid crossing splits or power planes, since return-path discontinuities cause severe ringing on the read-data eye at 104 MHz.
The W25Q128FWPIG draws <1 uA in deep power-down and <10 mA during active Quad reads at 104 MHz, so the host 1.8 V rail only needs a 100 nF decoupling cap plus a 1-10 uF bulk cap. To enter deep power-down (typically 1 uA standby), issue the 0xB9 command and pull /CS high; to release, send 0xAB. Add a wake-up guard time of 20-30 us between the release and the next command per the Winbond datasheet AC timing.
Compliance Information
RoHS and REACH compliant per Winbond product declaration. The W25Q128FWPIG is the standard industrial-grade version; AEC-Q100 automotive qualification is available only on the W25Q128FVSIG suffix variant. Halogen-free and lead-free reflow-compatible per JEDEC J-STD-020 MSL-3.
